18 Commits

Author	SHA1	Message	Date
David Harris	2d72bed1f4	Removed unused signals in FPU and CSR	2022-12-22 22:59:05 -08:00
David Harris	4f1b0fdc64	Preliminary support for big endian modes. Regression passes but no big endian tests written yet.	2022-05-08 06:46:35 +00:00
David Harris	1166c40059	FPU generates illegal instruction if MSTATUS.FS = 00	2022-05-03 11:56:31 +00:00
Kip Macsai-Goren	33875b20b5	fixed initial value, timing on fs bits changing after floating point instruction	2022-04-25 19:17:29 +00:00
David Harris	0957b7040d	Restored MPRV behavior per spec	2022-04-25 14:52:18 +00:00
David Harris	1a8369b02b	Added dummy mstatus byte endianness fields tied to 0, mstatush register, removed UIE and UPIE depricated fields	2022-04-25 14:49:00 +00:00
Ross Thompson	f8bdb6db49	Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main	2022-04-16 14:59:03 -05:00
Ross Thompson	bfc68bef69	Fixed possible bugs in LRSC.	2022-04-16 14:45:31 -05:00
David Harris	6e16922aae	WFI should set EPC to PC+4	2022-04-14 17:05:22 +00:00
bbracker	11423d1d17	but apparently QEMU doesn't show UXL in SSTATUS	2022-03-02 22:44:19 +00:00
bbracker	6d7bc928af	update SXL UXL bits in MSTATUS to match new QEMU trace	2022-03-02 22:15:57 +00:00
David Harris	72e83db9fe	removed csrn and all of its outputs because depricated	2022-02-15 19:59:29 +00:00
David Harris	f734afb866	Just needed to recompile - all good. Now removed uretM because N-mode is depricated	2022-02-15 19:48:49 +00:00
David Harris	38bbe23d14	More config file cleanup; 32ic tests broken	2022-02-03 01:08:34 +00:00
David Harris	02071700d6	Removed Busybear dependencies	2022-02-02 20:28:21 +00:00
David Harris	120fb7863f	Reformatted MIT license to 95 characters	2022-01-07 12:58:40 +00:00
David Harris	c1d6550ccb	Removed generate statements	2022-01-05 14:35:25 +00:00
David Harris	b36ace221e	Renamed wally-pipelined to pipelined	2022-01-04 19:47:41 +00:00