16 Commits

Author	SHA1	Message	Date
bbracker	448cba2a5b	JALR testing	2021-03-04 10:37:30 -05:00
Thomas Fleming	d8ac9034b7	Create virtual memory ad-hoc test ... Test program is currently failing on ovpsim. There is no indication that ovpsim is properly implementing virtual memory translation when satp is set accordingly. Need to confirm whether this is a problem with ovpsim, how ovpsim is being called, or the test itself.	2021-03-03 17:06:37 -05:00
David Harris	f00728448a	WALLY ALU tests	2021-02-15 10:16:31 -05:00
Domenico Ottolia	75d9091fe8	Add privileged test cases	2021-02-14 17:01:46 -05:00
Shreya Sanghai	30bfd7534c	added branch tests	2021-02-12 22:40:08 -05:00
Tejus Rao	5158ca4220	added test cases for ADDW, SUBW, SLLW, SRLW, SRAW	2021-02-11 13:38:38 -05:00
ethan-falicov	f778f464b7	Merge conflict fixing	2021-02-10 09:45:47 -05:00
ethan-falicov	06541260e0	Adding I Type test cases from Lab 1	2021-02-10 09:39:43 -05:00
Elizabeth Hedenberg	81a1eb9a74	merge conflict?	2021-02-07 02:34:49 -05:00
Jarred Allen	edd758453e	Add test vector set for load instructions	2021-02-06 13:05:59 -05:00
bbracker	691d651fde	JAL testing	2021-02-05 08:08:42 -05:00
Thomas Fleming	8588a1ed6b	Complete STORE tests	2021-02-04 15:38:22 -05:00
Jarred Allen	743695400d	Start on a test set for loads	2021-02-03 00:37:43 -05:00
David Harris	f32c70e866	testgen-ADD-SUB working and testbench simualtes with new vectors for rv32 and rv64	2021-01-20 01:04:28 -05:00
David Harris	e3a7fcb5f1	testgen-ADD-SUB initial untested	2021-01-19 22:58:56 -05:00
David Harris	5479342d00	Initial testgen checkin	2021-01-19 13:09:56 -05:00