forked from Github_Repos/cvw
Adding I Type test cases from Lab 1
This commit is contained in:
ethan-falicov
parent
79cb7ed571
commit
06541260e0
@ -136,7 +136,16 @@ string tests64iNOc[] = {
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"rv64i/I-XOR-01", "3000",
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"rv64i/I-XORI-01", "3000",
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"rv64i/WALLY-ADD", "4000",
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"rv64i/WALLY-SUB", "4000"
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"rv64i/WALLY-SUB", "4000",
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"rv64i/WALLY-ADDI", "3000",
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"rv64i/WALLY-ANDI", "3000",
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"rv64i/WALLY-ORI", "3000",
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"rv64i/WALLY-XORI", "3000",
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"rv64i/WALLY-SLTI", "3000",
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"rv64i/WALLY-SLTIU", "3000",
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"rv64i/WALLY-SLLI", "3000",
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"rv64i/WALLY-SRLI", "3000",
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"rv64i/WALLY-SRAI", "3000"
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};
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string tests32ic[] = '{
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// "rv32ic/WALLY-C-ADHOC-01", "2000",
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@ -217,7 +226,16 @@ string tests32i[] = {
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"rv32i/I-XOR-01","2000",
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"rv32i/I-XORI-01","2000",
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"rv32i/WALLY-ADD", "3000",
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"rv32i/WALLY-SUB", "3000"
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"rv32i/WALLY-SUB", "3000",
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"rv32i/WALLY-ADDI", "2000",
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"rv32i/WALLY-ANDI", "2000",
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"rv32i/WALLY-ORI", "2000",
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"rv32i/WALLY-XORI", "2000",
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"rv32i/WALLY-SLTI", "2000",
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"rv32i/WALLY-SLTIU", "2000",
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"rv32i/WALLY-SLLI", "2000",
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"rv32i/WALLY-SRLI", "2000",
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"rv32i/WALLY-SRAI", "2000"
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};
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string tests[];
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161
wally-pipelined/testgen/testgen-ADDI-XORI-ORI-ANDI-SLTI.py
Normal file
161
wally-pipelined/testgen/testgen-ADDI-XORI-ORI-ANDI-SLTI.py
Normal file
@ -0,0 +1,161 @@
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#!/usr/bin/python3
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##################################
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# testgen-ADD-SUB.py
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#
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# David_Harris@hmc.edu 19 January 2021
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#
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# Generate directed and random test vectors for RISC-V Design Validation.
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##################################
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##################################
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# libraries
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##################################
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from datetime import datetime
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from random import randint
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from random import seed
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from random import getrandbits
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##################################
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# functions
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##################################
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def computeExpected(a, b, test):
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if (test == "ADDI"):
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return a + b
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elif (test == "XORI"):
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return a ^ b
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elif (test == "ORI"):
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return a | b
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elif (test == "ANDI"):
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return a & b
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elif (test == "SLTI"):
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return a < b
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else:
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die("bad test name ", test)
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# exit(1)
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def evaluateTwoComplement(b, bits):
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if (b & (1 << (bits -1))!= 0):
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b = b - (1 << bits)
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return b
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def randRegs():
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reg1 = randint(1,31)
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reg3 = randint(1,31)
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if (reg1 == 6 or reg3 == 6):
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return randRegs()
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else:
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return reg1, reg3
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def writeVector(a, b, storecmd):
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global testnum
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expected = computeExpected(evaluateTwoComplement(a,xlen), evaluateTwoComplement(b, 12), test)
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expected = expected % 2**xlen # drop carry if necessary
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if (expected < 0): # take twos complement
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expected = 2**xlen + expected
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reg1, reg3 = randRegs()
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lines = "\n# Testcase " + str(testnum) + ": rs1:x" + str(reg1) + "(" + formatstr.format(a)
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lines = lines + "), imm12:" + "(" +formatstrimm12.format(b)
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lines = lines + "), result rd:x" + str(reg3) + "(" + formatstr.format(expected) +")\n"
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lines = lines + "li x" + str(reg1) + ", MASK_XLEN(" + formatstr.format(a) + ")\n"
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lines = lines + test + " x" + str(reg3) + ", x" + str(reg1) + ", SEXT_IMM(" + formatstrimm12.format(b) + ")\n"
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# lines = lines + test + " x" + str(reg3) + ", x" + str(reg1) + ", MASK_XLEN(" + formatstr.format(b) + ")\n"
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lines = lines + storecmd + " x" + str(reg3) + ", " + str(wordsize*testnum) + "(x6)\n"
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lines = lines + "RVTEST_IO_ASSERT_GPR_EQ(x7, " +"x" + str(reg3) +", "+formatstr.format(expected)+")\n"
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f.write(lines)
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if (xlen == 32):
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line = formatrefstr.format(expected)+"\n"
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else:
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line = formatrefstr.format(expected % 2**32)+"\n" + formatrefstr.format(expected >> 32) + "\n"
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r.write(line)
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testnum = testnum+1
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##################################
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# main body
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##################################
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# change these to suite your tests
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tests = ["ADDI", "XORI", "ORI", "ANDI", "SLTI"]
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author = "Shriya Nadgauda & Ethan Falicov"
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xlens = [32, 64]
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numrand = 100
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# setup
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seed(0) # make tests reproducible
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# generate files for each test
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for xlen in xlens:
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formatstrlen = str(int(xlen/4))
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formatstr = "0x{:0" + formatstrlen + "x}" # format as xlen-bit hexadecimal number
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formatrefstr = "{:08x}" # format as xlen-bit hexadecimal number with no leading 0x
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formatstrimm12 = "0x{:03x}" # format as 3-bit hexadecimal number
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if (xlen == 32):
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storecmd = "sw"
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wordsize = 4
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else:
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storecmd = "sd"
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wordsize = 8
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for test in tests:
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corners1 = [0, 1, 2, 0xFF, 0x624B3E976C52DD14 % 2**xlen, 2**(xlen-1)-2, 2**(xlen-1)-1,
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2**(xlen-1), 2**(xlen-1)+1, 0xC365DDEB9173AB42 % 2**xlen, 2**(xlen)-2, 2**(xlen)-1]
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immBitSize = 12
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corners2 = [0, 1, 2, 0xFF, 0x624 % 2**immBitSize, 2**(immBitSize-1)-2, 2**(immBitSize-1)-1,
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2**(immBitSize-1), 2**(immBitSize-1)+1, 0xC36 % 2**immBitSize, 2**(immBitSize)-2, 2**(immBitSize)-1]
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imperaspath = "../../imperas-riscv-tests/riscv-test-suite/rv" + str(xlen) + "i/"
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basename = "WALLY-" + test
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fname = imperaspath + "src/" + basename + ".S"
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refname = imperaspath + "references/" + basename + ".reference_output"
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testnum = 0
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# print custom header part
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f = open(fname, "w")
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r = open(refname, "w")
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line = "///////////////////////////////////////////\n"
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f.write(line)
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lines="// "+fname+ "\n// " + author + "\n"
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f.write(lines)
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line ="// Created " + str(datetime.now())
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f.write(line)
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# insert generic header
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h = open("testgen_header.S", "r")
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for line in h:
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f.write(line)
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# print directed and random test vectors
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for a in corners1:
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for b in corners2:
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writeVector(a, b, storecmd)
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for i in range(0,numrand):
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a = getrandbits(xlen)
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b = getrandbits(12)
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writeVector(a, b, storecmd)
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# print footer
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h = open("testgen_footer.S", "r")
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for line in h:
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f.write(line)
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# Finish
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lines = ".fill " + str(testnum) + ", " + str(wordsize) + ", -1\n"
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lines = lines + "\nRV_COMPLIANCE_DATA_END\n"
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f.write(lines)
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f.close()
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r.close()
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189
wally-pipelined/testgen/testgen-SLLI-SRLI-SRAI.py
Normal file
189
wally-pipelined/testgen/testgen-SLLI-SRLI-SRAI.py
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@ -0,0 +1,189 @@
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#!/usr/bin/python3
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##################################
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# testgen-ADD-SUB.py
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#
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# David_Harris@hmc.edu 19 January 2021
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#
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# Generate directed and random test vectors for RISC-V Design Validation.
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##################################
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##################################
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# libraries
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##################################
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from datetime import datetime
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from random import randint
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from random import seed
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from random import getrandbits
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##################################
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# functions
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##################################
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def computeExpected(a, b, test):
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if (test == "SLLI"):
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return a << b
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elif (test == "SRLI"):
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return srli(a,b)
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elif (test == "SRAI"):
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return a >> b
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else:
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die("bad test name ", test)
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# exit(1)
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def signExt(b, bits):
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a_str = bin(b)[2::]
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if (a_str[0] == "b"):
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a_str = a_str[1:]
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if (len(a_str) < 12):
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zeroPadding = "0" * (bits - len(a_str))
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a_str = zeroPadding + a_str
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print( "{:x}, {:s} ".format(b, a_str))
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padding = a_str[len(a_str)-1] * (bits - len(a_str))
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return int(padding + a_str, 2)
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def evaluateTwoComplement(b, bits):
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if (b & (1 << (bits -1))!= 0):
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b = b - (1 << bits)
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return b
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def srli(a,b):
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if (a < 0):
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a = 2**xlen + a
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if (b==0):
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return a
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a_str = bin(a)[2:]
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if a_str[0]== "b":
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a_str = a_str[1:]
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# print(a_str)
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numZeroPad = (len(a_str)-abs(b))
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out = a_str[:numZeroPad]
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if (numZeroPad <= 0):
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return 0
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print("a: {:b}, b: {:d}, out:{:b}".format(a, b, int(out,2)))
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return int(out,2)
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def randRegs():
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reg1 = randint(1,31)
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reg3 = randint(1,31)
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if (reg1 == 6 or reg3 == 6):
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return randRegs()
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else:
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return reg1, reg3
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def writeVector(a, b, storecmd):
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global testnum
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expected = computeExpected(evaluateTwoComplement(a, xlen), b, test)
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# print( "original {:x}, sign Extended {:x} ".format(b, signExt(b,xlen)))
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# print (str(a) + "<" + str(signExt(b,xlen)) + " : " + str(expected))
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expected = expected % 2**xlen # drop carry if necessary
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if (expected < 0): # take twos complement
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expected = 2**xlen + expected
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reg1, reg3 = randRegs()
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lines = "\n# Testcase " + str(testnum) + ": rs1:x" + str(reg1) + "(" + formatstr.format(a)
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lines = lines + "), imm5:" + "(" +formatstrimm5.format(b)
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lines = lines + "), result rd:x" + str(reg3) + "(" + formatstr.format(expected) +")\n"
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lines = lines + "li x" + str(reg1) + ", MASK_XLEN(" + formatstr.format(a) + ")\n"
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lines = lines + test + " x" + str(reg3) + ", x" + str(reg1) + ", " + formatstrimm5.format(b) + "\n"
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# lines = lines + test + " x" + str(reg3) + ", x" + str(reg1) + ", MASK_XLEN(" + formatstr.format(b) + ")\n"
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lines = lines + storecmd + " x" + str(reg3) + ", " + str(wordsize*testnum) + "(x6)\n"
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lines = lines + "RVTEST_IO_ASSERT_GPR_EQ(x7, " +"x" + str(reg3) +", "+formatstr.format(expected)+")\n"
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f.write(lines)
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if (xlen == 32):
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line = formatrefstr.format(expected)+"\n"
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else:
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line = formatrefstr.format(expected % 2**32)+"\n" + formatrefstr.format(expected >> 32) + "\n"
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r.write(line)
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testnum = testnum+1
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##################################
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# main body
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##################################
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# change these to suite your tests
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tests = ["SLLI", "SRLI", "SRAI"]
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author = "Shriya Nadgauda & Ethan Falicov"
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xlens = [32, 64]
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numrand = 100
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# setup
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seed(0) # make tests reproducible
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# generate files for each test
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for xlen in xlens:
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formatstrlen = str(int(xlen/4))
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formatstr = "0x{:0" + formatstrlen + "x}" # format as xlen-bit hexadecimal number
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formatrefstr = "{:08x}" # format as xlen-bit hexadecimal number with no leading 0x
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formatstrimm5 = "0b{:05b}" # format as 5-bit binary number
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if (xlen == 32):
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storecmd = "sw"
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wordsize = 4
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else:
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storecmd = "sd"
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wordsize = 8
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for test in tests:
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corners1 = [0, 1, 2, 0xFF, 0x624B3E976C52DD14 % 2**xlen, 2**(xlen-1)-2, 2**(xlen-1)-1,
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2**(xlen-1), 2**(xlen-1)+1, 0xC365DDEB9173AB42 % 2**xlen, 2**(xlen)-2, 2**(xlen)-1]
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immBitSize = 5
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corners2 = [0, 1, 2, 0x07, 0x14 % 2**immBitSize, 2**(immBitSize-1)-2, 2**(immBitSize-1)-1,
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2**(immBitSize-1), 2**(immBitSize-1)+1, 0x06 % 2**immBitSize, 2**(immBitSize)-2, 2**(immBitSize)-1]
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imperaspath = "../../imperas-riscv-tests/riscv-test-suite/rv" + str(xlen) + "i/"
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basename = "WALLY-" + test
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fname = imperaspath + "src/" + basename + ".S"
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refname = imperaspath + "references/" + basename + ".reference_output"
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testnum = 0
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# print custom header part
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f = open(fname, "w")
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r = open(refname, "w")
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line = "///////////////////////////////////////////\n"
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f.write(line)
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lines="// "+fname+ "\n// " + author + "\n"
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f.write(lines)
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line ="// Created " + str(datetime.now())
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f.write(line)
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# insert generic header
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h = open("testgen_header.S", "r")
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for line in h:
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f.write(line)
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# print directed and random test vectors
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for a in corners1:
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for b in corners2:
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writeVector(a, b, storecmd)
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for i in range(0,numrand):
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a = getrandbits(xlen)
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b = getrandbits(5)
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writeVector(a, b, storecmd)
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# print footer
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h = open("testgen_footer.S", "r")
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for line in h:
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f.write(line)
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# Finish
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lines = ".fill " + str(testnum) + ", " + str(wordsize) + ", -1\n"
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lines = lines + "\nRV_COMPLIANCE_DATA_END\n"
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f.write(lines)
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f.close()
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r.close()
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173
wally-pipelined/testgen/testgen-SLTIU.py
Normal file
173
wally-pipelined/testgen/testgen-SLTIU.py
Normal file
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#!/usr/bin/python3
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##################################
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# testgen-ADD-SUB.py
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#
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# David_Harris@hmc.edu 19 January 2021
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#
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# Generate directed and random test vectors for RISC-V Design Validation.
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##################################
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##################################
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# libraries
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##################################
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from datetime import datetime
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from random import randint
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from random import seed
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from random import getrandbits
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##################################
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# functions
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##################################
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def computeExpected(a, b, test):
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if (test == "SLTIU"):
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return a < b
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else:
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die("bad test name ", test)
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# exit(1)
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def signExt(b, bits):
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a_str = bin(b)[2::]
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if (a_str[0] == "b"):
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a_str = a_str[1:]
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if (len(a_str) < 12):
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zeroPadding = "0" * (12 - len(a_str))
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a_str = zeroPadding + a_str
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padding = a_str[0] * (bits - len(a_str))
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print( "b {:x}, sign extended {:s} ".format(b, padding + a_str))
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return int(padding + a_str, 2)
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def evaluateTwoComplement(b, bits):
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if (b & (1 << (bits -1))!= 0):
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b = b - (1 << bits)
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return b
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def randRegs():
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reg1 = randint(1,31)
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reg3 = randint(1,31)
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if (reg1 == 6 or reg3 == 6):
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||||
return randRegs()
|
||||
else:
|
||||
return reg1, reg3
|
||||
|
||||
def writeVector(a, b, storecmd):
|
||||
global testnum
|
||||
|
||||
|
||||
|
||||
signExtImm = signExt(b,xlen)
|
||||
if signExtImm < 0:
|
||||
signExtImm = signExtImm + 2 ** xlen
|
||||
expected = computeExpected(a, signExtImm, test)
|
||||
# s
|
||||
|
||||
expected = expected % 2**xlen # drop carry if necessary
|
||||
if (expected < 0): # take twos complement
|
||||
expected = 2**xlen + expected
|
||||
|
||||
|
||||
|
||||
reg1, reg3 = randRegs()
|
||||
lines = "\n# Testcase " + str(testnum) + ": rs1:x" + str(reg1) + "(" + formatstr.format(a)
|
||||
lines = lines + "), imm12:" + "(" +formatstrimm12.format(b)
|
||||
lines = lines + "), result rd:x" + str(reg3) + "(" + formatstr.format(expected) +")\n"
|
||||
lines = lines + "li x" + str(reg1) + ", MASK_XLEN(" + formatstr.format(a) + ")\n"
|
||||
lines = lines + test + " x" + str(reg3) + ", x" + str(reg1) + ", SEXT_IMM(" + formatstrimm12.format(b) + ")\n"
|
||||
# lines = lines + test + " x" + str(reg3) + ", x" + str(reg1) + ", MASK_XLEN(" + formatstr.format(b) + ")\n"
|
||||
lines = lines + storecmd + " x" + str(reg3) + ", " + str(wordsize*testnum) + "(x6)\n"
|
||||
lines = lines + "RVTEST_IO_ASSERT_GPR_EQ(x7, " +"x" + str(reg3) +", "+formatstr.format(expected)+")\n"
|
||||
f.write(lines)
|
||||
if (xlen == 32):
|
||||
line = formatrefstr.format(expected)+"\n"
|
||||
else:
|
||||
line = formatrefstr.format(expected % 2**32)+"\n" + formatrefstr.format(expected >> 32) + "\n"
|
||||
r.write(line)
|
||||
testnum = testnum+1
|
||||
|
||||
##################################
|
||||
# main body
|
||||
##################################
|
||||
|
||||
# change these to suite your tests
|
||||
tests = ["SLTIU"]
|
||||
author = "Shriya Nadgauda & Ethan Falicov"
|
||||
xlens = [32, 64]
|
||||
numrand = 100
|
||||
|
||||
|
||||
# setup
|
||||
seed(0) # make tests reproducible
|
||||
|
||||
# generate files for each test
|
||||
for xlen in xlens:
|
||||
formatstrlen = str(int(xlen/4))
|
||||
formatstr = "0x{:0" + formatstrlen + "x}" # format as xlen-bit hexadecimal number
|
||||
formatrefstr = "{:08x}" # format as xlen-bit hexadecimal number with no leading 0x
|
||||
|
||||
formatstrimm12 = "0x{:03x}" # format as 3-bit hexadecimal number
|
||||
if (xlen == 32):
|
||||
storecmd = "sw"
|
||||
wordsize = 4
|
||||
else:
|
||||
storecmd = "sd"
|
||||
wordsize = 8
|
||||
|
||||
for test in tests:
|
||||
corners1 = [0, 1, 2, 0xFF, 0x624B3E976C52DD14 % 2**xlen, 2**(xlen-1)-2, 2**(xlen-1)-1,
|
||||
2**(xlen-1), 2**(xlen-1)+1, 0xC365DDEB9173AB42 % 2**xlen, 2**(xlen)-2, 2**(xlen)-1]
|
||||
|
||||
immBitSize = 12
|
||||
corners2 = [0, 1, 2, 0xFF, 0x624 % 2**immBitSize, 2**(immBitSize-1)-2, 2**(immBitSize-1)-1,
|
||||
2**(immBitSize-1), 2**(immBitSize-1)+1, 0xC36 % 2**immBitSize, 2**(immBitSize)-2, 2**(immBitSize)-1]
|
||||
|
||||
imperaspath = "../../imperas-riscv-tests/riscv-test-suite/rv" + str(xlen) + "i/"
|
||||
basename = "WALLY-" + test
|
||||
fname = imperaspath + "src/" + basename + ".S"
|
||||
refname = imperaspath + "references/" + basename + ".reference_output"
|
||||
testnum = 0
|
||||
|
||||
# print custom header part
|
||||
f = open(fname, "w")
|
||||
r = open(refname, "w")
|
||||
line = "///////////////////////////////////////////\n"
|
||||
f.write(line)
|
||||
lines="// "+fname+ "\n// " + author + "\n"
|
||||
f.write(lines)
|
||||
line ="// Created " + str(datetime.now())
|
||||
f.write(line)
|
||||
|
||||
# insert generic header
|
||||
h = open("testgen_header.S", "r")
|
||||
for line in h:
|
||||
f.write(line)
|
||||
|
||||
# print directed and random test vectors
|
||||
for a in corners1:
|
||||
for b in corners2:
|
||||
writeVector(a, b, storecmd)
|
||||
for i in range(0,numrand):
|
||||
a = getrandbits(xlen)
|
||||
b = getrandbits(12)
|
||||
writeVector(a, b, storecmd)
|
||||
|
||||
|
||||
# print footer
|
||||
h = open("testgen_footer.S", "r")
|
||||
for line in h:
|
||||
f.write(line)
|
||||
|
||||
# Finish
|
||||
lines = ".fill " + str(testnum) + ", " + str(wordsize) + ", -1\n"
|
||||
lines = lines + "\nRV_COMPLIANCE_DATA_END\n"
|
||||
f.write(lines)
|
||||
f.close()
|
||||
r.close()
|
||||
|
||||
|
||||
|
||||
Loading…
Reference in New Issue
Block a user