17 Commits

Author	SHA1	Message	Date
Katherine Parry	41c16be012	srt divider merged into fpu	2022-07-07 16:01:33 -07:00
Katherine Parry	1b4584e825	Renaming signals to match chapter	2022-07-03 12:26:22 -07:00
slmnemo	7c019ea074	Removed references to initialization files	2022-06-23 16:50:27 -07:00
Katherine Parry	b54d84195f	added radix-4 0/d handling	2022-06-23 22:36:19 +00:00
DTowersM	dd34f25ffd	changed DCACHE_LINELENINBITS and ICACHE_LINELENINBITS to 512, had to modigy the wfi test to increase timee before interupt to mantain compatability	2022-06-10 00:37:53 +00:00
Katherine Parry	8fa0fc4229	fma synth warnings and errors removed	2022-06-06 16:06:04 +00:00
Katherine Parry	9a09ee3a35	fpu paramaterized - except fdivsqrt	2022-06-02 19:50:28 +00:00
slmnemo	c16c5beef5	Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main	2022-06-02 02:52:03 +00:00
slmnemo	65961223f8	Updated Linux testbench to use new force/unforce method for Branch predictor init and removed related .txt files	2022-06-02 02:51:51 +00:00
Katherine Parry	e42afbfb30	paramerterized some small fma units	2022-06-01 23:34:29 +00:00
Katherine Parry	738bbf6479	Added fp tests - doesnpass yet	2022-05-19 16:32:30 +00:00
David Harris	4f1b0fdc64	Preliminary support for big endian modes. Regression passes but no big endian tests written yet.	2022-05-08 06:46:35 +00:00
Kip Macsai-Goren	746fcfde30	set WFI timeout to after 16 bits of counting for all configs	2022-04-28 18:14:08 +00:00
Shreya Sanghai	a8b3cc8cf9	added bpred size to wally config	2022-04-18 04:21:03 +00:00
David Harris	b4902a6ff9	First implementation of WFI timeout wait	2022-04-17 17:20:35 +00:00
Katherine Parry	c3d07b2c46	generating all testfloat vectors	2022-04-04 17:17:12 +00:00
Katherine Parry	e3d01c875b	FMA parameterized and FMA testbench reworked	2022-03-19 19:39:03 +00:00