David Harris
|
2ceed15bd5
|
Moved TLB Flush logic into privdec
|
2022-05-12 16:41:52 +00:00 |
|
David Harris
|
1e5d94bbab
|
Moved WFI timeout into privdec
|
2022-05-12 16:22:39 +00:00 |
|
David Harris
|
39ceb3a550
|
Partitioned privilege mode fsm into new module
|
2022-05-12 16:16:42 +00:00 |
|
David Harris
|
5670f77de2
|
More unused signal cleanup
|
2022-05-12 15:21:09 +00:00 |
|
David Harris
|
4edf9b6355
|
More unused signal cleanup
|
2022-05-12 15:15:30 +00:00 |
|
David Harris
|
1aa3e65bae
|
Removed more unused signals, simplified csri state
|
2022-05-12 15:10:10 +00:00 |
|
David Harris
|
e2e63ca9a8
|
Clean up unused signals
|
2022-05-12 14:49:58 +00:00 |
|
David Harris
|
545d46acb9
|
Simplifed mstatus.TSR handling
|
2022-05-12 14:09:52 +00:00 |
|
David Harris
|
8166fd772e
|
Added M prefix for MTimerInt and MSwInt to distinguish from future supervisor SwInt
|
2022-05-11 15:08:33 +00:00 |
|
David Harris
|
137b411bea
|
Removed M suffix from interrupts because they are generated asynchronously to pipeline
|
2022-05-11 14:41:55 +00:00 |
|
David Harris
|
4f1b0fdc64
|
Preliminary support for big endian modes. Regression passes but no big endian tests written yet.
|
2022-05-08 06:46:35 +00:00 |
|
David Harris
|
a516f89f22
|
WFI terminates when an interrupt is pending even if interrupts are globally disabled
|
2022-05-08 04:30:46 +00:00 |
|
David Harris
|
7f42ff06d2
|
SFENCE.VMA should be illegal in user mode
|
2022-05-05 15:15:02 +00:00 |
|
David Harris
|
9b7aab122e
|
wally32priv and wally64priv now passing WALLY-status-tw. Fixed privileged.sv to produce the correct EPC on timeouts
|
2022-05-05 14:37:21 +00:00 |
|
David Harris
|
1a7599ce94
|
Changed WFI to stall pipeline in memory stage
|
2022-05-05 02:03:44 +00:00 |
|
David Harris
|
4b91fddc0a
|
Illegal instruction fault when running FPU instruction with STATUS_FS = 0
|
2022-05-03 18:32:01 +00:00 |
|
David Harris
|
1166c40059
|
FPU generates illegal instruction if MSTATUS.FS = 00
|
2022-05-03 11:56:31 +00:00 |
|
David Harris
|
142636173e
|
Added MTINST hardwired to 0, and added timeout of U-mode WFI
|
2022-04-24 20:00:02 +00:00 |
|
Kip Macsai-Goren
|
bd87af478a
|
Changed mtval for instruction misaligned fault to get address from ieuAdrM (Jal/branch target address)
|
2022-04-22 22:46:11 +00:00 |
|
David Harris
|
5bb521635e
|
Experiments with prefix comparator; minor fixes in WFI and testbench warnings
|
2022-04-17 21:43:12 +00:00 |
|
David Harris
|
b4902a6ff9
|
First implementation of WFI timeout wait
|
2022-04-17 17:20:35 +00:00 |
|
David Harris
|
6e16922aae
|
WFI should set EPC to PC+4
|
2022-04-14 17:05:22 +00:00 |
|
Ross Thompson
|
de868ef3a2
|
Possible fix for trap concurent with xret. Fixes the priority so trap has higher priority than either sret or mret. Previous code had priority to xret in the trap logic and privilege logic, but not the csrsr logic. This caused partial execution of the instruction.
|
2022-04-07 16:56:28 -05:00 |
|
bbracker
|
69a0f6e00b
|
big interrupts refactor
|
2022-03-30 13:22:41 -07:00 |
|
bbracker
|
4b376e2834
|
1st attempt at multiple channel PLIC
|
2022-03-24 17:08:10 -07:00 |
|
David Harris
|
72e83db9fe
|
removed csrn and all of its outputs because depricated
|
2022-02-15 19:59:29 +00:00 |
|
David Harris
|
f734afb866
|
Just needed to recompile - all good. Now removed uretM because N-mode is depricated
|
2022-02-15 19:48:49 +00:00 |
|
David Harris
|
1326ade1a0
|
Removed depricated N-mode support and SI/EDELEG registers. rv64gc_wally64priv tests are failing, but seem to be failing before this change.
|
2022-02-15 19:20:41 +00:00 |
|
Ross Thompson
|
862bf2faae
|
Moved all instr/load/storeamo faults to mmu with the exception of instr misaligned fault.
|
2022-01-27 17:11:27 -06:00 |
|
Ross Thompson
|
4a75e69457
|
Merged in the debug ila updates.
|
2022-01-18 17:29:21 -06:00 |
|
Ross Thompson
|
459f4bd3b4
|
Hack "fix" to prevent interrupt from occuring during an integer divide.
This is not the desired solution but will allow continued debuging of linux.
|
2022-01-12 14:17:16 -06:00 |
|
Ross Thompson
|
73c488914f
|
Added icache access and icache miss to performance counters.
|
2022-01-09 22:56:56 -06:00 |
|
David Harris
|
b36ace221e
|
Renamed wally-pipelined to pipelined
|
2022-01-04 19:47:41 +00:00 |
|