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Simplifed mstatus.TSR handling

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This commit is contained in:
David Harris 2022-05-12 14:09:52 +00:00
parent d353cef432
commit 545d46acb9
2 changed files with 8 additions and 9 deletions
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11
pipelined/src/privileged/privdec.sv
View File

@ -34,7 +34,7 @@
module privdec (
input logic [31:20] InstrM,
input logic PrivilegedM, IllegalIEUInstrFaultM, IllegalCSRAccessM, IllegalFPUInstrM,
input logic TrappedSRETM, WFITimeoutM,
input logic WFITimeoutM,
input logic [1:0] PrivilegeModeW,
input logic STATUS_TSR, STATUS_TVM,
input logic [1:0] STATUS_FS,
@ -43,18 +43,19 @@ module privdec (
logic IllegalPrivilegedInstrM, IllegalOrDisabledFPUInstrM;
// xRET defined in Privileged Spect 3.2.2
// Decode privileged instructions
assign sretM = PrivilegedM & (InstrM[31:20] == 12'b000100000010) & `S_SUPPORTED &
PrivilegeModeW[0] & ~STATUS_TSR;
(PrivilegeModeW == `M_MODE || PrivilegeModeW == `S_MODE & ~STATUS_TSR);
assign mretM = PrivilegedM & (InstrM[31:20] == 12'b001100000010) & (PrivilegeModeW == `M_MODE);
assign ecallM = PrivilegedM & (InstrM[31:20] == 12'b000000000000);
assign ebreakM = PrivilegedM & (InstrM[31:20] == 12'b000000000001);
assign wfiM = PrivilegedM & (InstrM[31:20] == 12'b000100000101);
assign sfencevmaM = PrivilegedM & (InstrM[31:25] == 7'b0001001) &
(PrivilegeModeW == `M_MODE | (PrivilegeModeW == `S_MODE & ~STATUS_TVM));
// Fault on illegal instructions
assign IllegalPrivilegedInstrM = PrivilegedM & ~(sretM|mretM|ecallM|ebreakM|wfiM|sfencevmaM);
assign IllegalOrDisabledFPUInstrM = IllegalFPUInstrM | (STATUS_FS == 2'b00);
assign IllegalInstrFaultM = (IllegalIEUInstrFaultM & IllegalOrDisabledFPUInstrM) | IllegalPrivilegedInstrM | IllegalCSRAccessM |
TrappedSRETM | WFITimeoutM;
WFITimeoutM;
endmodule

6
pipelined/src/privileged/privileged.sv
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@ -95,7 +95,7 @@ module privileged (
logic IllegalFPUInstrM;
logic InstrPageFaultD, InstrPageFaultE, InstrPageFaultM;
logic InstrAccessFaultD, InstrAccessFaultE, InstrAccessFaultM;
logic IllegalInstrFaultM, TrappedSRETM;
logic IllegalInstrFaultM;
logic MTrapM, STrapM, UTrapM;
(* mark_debug = "true" *) logic InterruptM;
@ -129,8 +129,6 @@ module privileged (
end else NextPrivilegeModeM = PrivilegeModeW;
end
assign TrappedSRETM = sretM & STATUS_TSR & PrivilegeModeW == `S_MODE;
flopenl #(2) privmodereg(clk, reset, ~StallW, NextPrivilegeModeM, `M_MODE, PrivilegeModeW);
///////////////////////////////////////////
@ -149,7 +147,7 @@ module privileged (
///////////////////////////////////////////
privdec pmd(.InstrM(InstrM[31:20]),
.PrivilegedM, .IllegalIEUInstrFaultM, .IllegalCSRAccessM, .IllegalFPUInstrM, .TrappedSRETM, .WFITimeoutM,
.PrivilegedM, .IllegalIEUInstrFaultM, .IllegalCSRAccessM, .IllegalFPUInstrM, .WFITimeoutM,
.PrivilegeModeW, .STATUS_TSR, .STATUS_TVM, .STATUS_FS, .IllegalInstrFaultM,
.sretM, .mretM, .ecallM, .ebreakM, .wfiM, .sfencevmaM);