127 Commits

Author	SHA1	Message	Date
Kevin Kim	19beed7866	extend unit structural mux	2023-03-05 15:09:02 -08:00
Kevin Kim	7531bf1fd6	zbb result select mux structural	2023-03-05 14:57:30 -08:00
Kevin Kim	3656d42ac0	zbc input mux structural	2023-03-05 14:26:31 -08:00
Kevin Kim	869e812aa8	revA signals to cnt, zbb	2023-03-05 14:26:24 -08:00
Kevin Kim	0e6ea0ee60	ALU changes ... - added PreShiftAmt signal for shadd - condinvB now muxes from B instead of mask	2023-03-05 14:06:24 -08:00
Kevin Kim	3d5ee8d964	bug in bctrl ... - deleted the min/minu decoding for some reason.	2023-03-04 23:56:33 -08:00
Kevin Kim	6ead150cb1	BSelect from OH encoding to Binary	2023-03-04 23:19:31 -08:00
Kevin Kim	4b1ee5a196	alu pre-shift ... -changed ALU pre shift logic to use a 2 bit shifter instead of mux	2023-03-04 23:07:06 -08:00
Kevin Kim	b0f152de28	added python script ... -I've been using this python script to make quick changes to the bitmanip controller	2023-03-04 22:54:32 -08:00
Kevin Kim	6295178073	removed rotate signal in datapath and instead packed into the new BALUControl Signal ... - BALUControl contains Rotate, Mask, PreShift signals to select from the respective generation muxes in the ALU	2023-03-04 22:44:03 -08:00
Kevin Kim	b6dd855395	zbc result mux is now structural	2023-03-04 09:22:21 -08:00
Kevin Kim	6e52113208	Rotate signal now gets generated in bmu ctrl	2023-03-03 22:57:49 -08:00
Kevin Kim	18ab538a5e	license comments	2023-03-03 21:52:34 -08:00
Kevin Kim	efce306aab	removed redundant signals in controller	2023-03-03 21:52:25 -08:00
Kevin Kim	448e950eba	b controller generates comparison signed flag and controller branch signed logic updated accordingly	2023-03-03 17:12:29 -08:00
Kevin Kim	0bb75132c6	sltD signal debug. Passes regression	2023-03-03 12:44:33 -08:00
Kevin Kim	d24f74dc4b	sltD logic optimize	2023-03-03 12:35:40 -08:00
Kevin Kim	66b15b9163	Merge branch 'bctrlmigrate' of https://github.com/kipmacsaigoren/cvw into bctrlmigrate	2023-03-03 09:54:08 -08:00
Kevin Kim	0dee48fa5c	Merge branch 'openhwgroup:main' into bctrlmigrate	2023-03-03 09:53:59 -08:00
Kevin Kim	77c9114bcc	removed outdated b-signals in controller	2023-03-03 08:45:42 -08:00
Kevin Kim	2b9a6aba91	comments to bctrl	2023-03-03 08:41:47 -08:00
Kevin Kim	11f165d1bb	migrated B-subarith logic into b controller	2023-03-03 08:40:29 -08:00
Kevin Kim	b5a5f364e1	began subarith configurability optimization in controller	2023-03-03 08:27:11 -08:00
Ross Thompson	b19d51b6a2	Added fence counter.	2023-03-02 23:29:20 -06:00
Kevin Kim	f4b8968e12	bug fix, more elegant logic changes in controller	2023-03-02 16:00:56 -08:00
Kevin Kim	2a0c59d5a7	formatting	2023-03-02 15:28:43 -08:00
Kevin Kim	d0c486df54	removed main instruction decoder dependence on bmu controller	2023-03-02 15:28:33 -08:00
Kevin Kim	11a977ffe3	added bitmanip illegal instruction signal	2023-03-02 15:09:55 -08:00
Kevin Kim	b52208b539	zbc comments	2023-03-02 13:52:00 -08:00
Kevin Kim	2d7d143f6d	formatted bmu decoder	2023-03-02 13:45:15 -08:00
Kevin Kim	1b222f91be	moved ALUControlD into configurable block	2023-03-02 12:17:03 -08:00
Kevin Kim	1e1ecaafb1	moved SubArith and RegWriteE into configurable block	2023-03-02 12:15:57 -08:00
Kevin Kim	7dd4a2e975	added BRegWriteE signal	2023-03-02 12:15:22 -08:00
Kevin Kim	d40f3b2a1c	rename shifternew to shifter	2023-03-02 11:45:32 -08:00
Kevin Kim	905373d53b	zbc input select mux optimize	2023-03-02 11:43:05 -08:00
Kevin Kim	2bfbf051a5	zbc select mux optimization	2023-03-02 11:40:29 -08:00
Kevin Kim	44d40afca8	fixed controller lint, changed byte unit mux select name and input width	2023-03-02 11:36:12 -08:00
Kevin Kim	96995c5593	removed redundant zbs	2023-03-02 11:22:09 -08:00
Kip Macsai-Goren	9e52ede0cd	Merge remote-tracking branch 'upstream/main' into bit-manip	2023-02-28 14:41:51 -08:00
Kevin Kim	036cad71c6	bitmanip decoder spits out regwrite, w64, and aluop signals [NEEDS DEBUG]	2023-02-28 12:09:35 -08:00
Kevin Kim	6835a635cc	added BRegWrite, BW64, BALUOp signals to bctrl and controller ... -TODO: Main decode in bmuctrl must assert these 3 signals	2023-02-28 11:54:10 -08:00
Kevin Kim	82059fba67	changed shifter source select signal name	2023-02-28 11:41:40 -08:00
Kevin Kim	30ef1ac9e3	rename result back to ALUResult in ALU	2023-02-28 07:27:34 -08:00
David Harris	5c8fee127b	Added support for ZMMUL	2023-02-27 07:29:53 -08:00
Kevin Kim	c7050ada78	removed old shifter	2023-02-24 17:33:47 -08:00
Kevin Kim	b3180d7307	removed now-redundant zero-extend mux in alu	2023-02-24 17:14:12 -08:00
Kevin Kim	0fe1d3b9f3	took sign extension out of shifter	2023-02-24 17:09:56 -08:00
Kevin Kim	a856c5de96	optimized mux to shifter, passes rv32/64i	2023-02-24 12:09:34 -08:00
Kevin Kim	f0cf7c2c6a	small optimization to condzext select	2023-02-23 21:57:28 -08:00
Kip Macsai-Goren	f8f89e692e	Fixed lint errors on zero and pop count. All of regression passes	2023-02-22 20:25:51 -08:00