eroom1966
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72b92e8c0d
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update testbench for memory privileges
also update configuration to define value of mimpid
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2023-03-01 15:37:11 +00:00 |
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Ross Thompson
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2773048bd4
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Name cleanup.
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2023-02-28 17:48:58 -06:00 |
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David Harris
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bd6a1dcf40
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Pulled to latest commit of riscv-arch-test
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2023-02-28 15:03:59 -08:00 |
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Kip Macsai-Goren
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9e52ede0cd
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Merge remote-tracking branch 'upstream/main' into bit-manip
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2023-02-28 14:41:51 -08:00 |
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Kip Macsai-Goren
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2cab4a2f0a
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Merge remote-tracking branch 'origin' into bit-manip
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2023-02-28 14:39:57 -08:00 |
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Ross Thompson
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87013ccaf0
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Found the performance bug with the branch predictor btb power saving update.
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2023-02-28 15:57:34 -06:00 |
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Ross Thompson
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8af61c0cc0
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Name changes to reflect diagrams.
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2023-02-28 15:37:25 -06:00 |
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Ross Thompson
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a823d8d021
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Undid the btb update as it reduces performance.
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2023-02-28 15:21:56 -06:00 |
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Kevin Kim
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036cad71c6
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bitmanip decoder spits out regwrite, w64, and aluop signals [NEEDS DEBUG]
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2023-02-28 12:09:35 -08:00 |
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Kevin Kim
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6835a635cc
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added BRegWrite, BW64, BALUOp signals to bctrl and controller
-TODO: Main decode in bmuctrl must assert these 3 signals
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2023-02-28 11:54:10 -08:00 |
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Kevin Kim
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82059fba67
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changed shifter source select signal name
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2023-02-28 11:41:40 -08:00 |
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Kevin Kim
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30ef1ac9e3
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rename result back to ALUResult in ALU
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2023-02-28 07:27:34 -08:00 |
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Ross Thompson
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3261f31e88
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This icpred and btb changes are causing a performance issue.
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2023-02-27 20:00:50 -06:00 |
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Ross Thompson
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69e8358639
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Modified the BTB to save power by not updating when the prediction is unchanged.
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2023-02-27 17:37:29 -06:00 |
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Ross Thompson
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44361f0a34
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Merge branch 'main' of https://github.com/openhwgroup/cvw
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2023-02-27 09:48:03 -06:00 |
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Ross Thompson
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1f10092f8f
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Merge pull request #117 from davidharrishmc/dev
ZMMUL support and MMU cleanup
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2023-02-27 09:46:40 -06:00 |
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David Harris
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5c8fee127b
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Added support for ZMMUL
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2023-02-27 07:29:53 -08:00 |
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Ross Thompson
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a81cc883e9
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Signal name changes.
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2023-02-27 00:39:19 -06:00 |
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David Harris
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0d3d499940
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hptw typo fix
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2023-02-26 19:38:34 -08:00 |
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Ross Thompson
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447f6b1443
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Branch predictor cleanup.
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2023-02-26 21:28:36 -06:00 |
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David Harris
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907fbfec38
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Simplified Access fault logic in HPTW
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2023-02-26 18:50:37 -08:00 |
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David Harris
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fa5be45dcd
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Merge branch 'main' of https://github.com/openhwgroup/cvw into dev
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2023-02-26 18:35:14 -08:00 |
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David Harris
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d3f5708ded
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StoreAmo faults are generated instead of load faults on AMO operations
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2023-02-26 18:35:10 -08:00 |
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Ross Thompson
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3804626166
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Create module for instruction class prediction and decoding.
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2023-02-26 20:20:30 -06:00 |
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Ross Thompson
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86f611577f
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Merge branch 'main' of https://github.com/openhwgroup/cvw into main
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2023-02-26 19:58:24 -06:00 |
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David Harris
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d2fd34efe6
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Renamed DAPageFault to UpdateDA
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2023-02-26 17:51:45 -08:00 |
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David Harris
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246deeda82
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renamed UpperBitsUnequalPageFault to UpperBitsUnequal
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2023-02-26 17:32:34 -08:00 |
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David Harris
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099267ffce
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moved tlb to subdirectory
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2023-02-26 17:31:03 -08:00 |
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David Harris
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a9e884acc8
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Moved TLB into subdirectory of MMU
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2023-02-26 17:28:05 -08:00 |
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Ross Thompson
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52faec7922
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Merge pull request #116 from davidharrishmc/dev
Removed unneeded TLBFlush from TLBMiss logic
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2023-02-26 12:07:41 -06:00 |
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Ross Thompson
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bb276da6eb
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Merge branch 'main' of https://github.com/openhwgroup/cvw into main
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2023-02-26 12:06:06 -06:00 |
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David Harris
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ab178d0956
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Merge branch 'main' of https://github.com/openhwgroup/cvw into dev
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2023-02-26 10:04:47 -08:00 |
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David Harris
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2ad62ea31f
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Removed unneeded TLBFlush from TLBMiss
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2023-02-26 10:04:16 -08:00 |
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Ross Thompson
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f411e63dc8
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Merge pull request #115 from davidharrishmc/dev
Fixed SSTC being unusable in M-MODE without Status.TM. Disable STIME…
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2023-02-26 12:02:54 -06:00 |
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David Harris
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2203c05724
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Access faults are geted by ~TLBMiss rather than ~(Translate & ~TLBHit)
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2023-02-26 09:58:34 -08:00 |
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David Harris
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4579a9d0c2
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Renamed HPTW_WRITES_SUPPORTED to SVADU_SUPPORTED
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2023-02-26 09:38:32 -08:00 |
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David Harris
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e3e5100f8d
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Renamed DAPageFault to HPTWDAPageFault in hptw to avoid name conflict with DAPageFault from tlbcontrol
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2023-02-26 07:12:43 -08:00 |
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David Harris
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d50658addf
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Fixed missing assign when SSTC is not supported
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2023-02-26 07:12:13 -08:00 |
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David Harris
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27acb90217
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Fixed SSTC being unusable in M-MODE without Status.TM. Disable STIMECMP registers when SSTC_SUPPORTED = 0
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2023-02-26 06:30:43 -08:00 |
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Ross Thompson
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7500bb75c6
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PHT was enabled using the wrong ~flush and ~stall.
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2023-02-24 22:57:32 -06:00 |
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Ross Thompson
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63b9f9ca3d
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gshare cleanup.
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2023-02-24 22:55:51 -06:00 |
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Ross Thompson
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eb8d6f016f
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Merge branch 'main' of https://github.com/openhwgroup/cvw
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2023-02-24 19:57:18 -06:00 |
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Ross Thompson
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ed7ab402ad
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More signal renames.
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2023-02-24 19:56:55 -06:00 |
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Ross Thompson
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e549bec060
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Renamed signals to match new figures.
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2023-02-24 19:51:47 -06:00 |
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Kevin Kim
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c7050ada78
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removed old shifter
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2023-02-24 17:33:47 -08:00 |
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Kevin Kim
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9d119d1312
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Merge pull request #1 from kipmacsaigoren/kkim_alu_new
removed sign-extension muxes in shifter
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2023-02-24 17:31:36 -08:00 |
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Ross Thompson
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6ff524d843
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Renamed signals to match figure 10.18.
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2023-02-24 19:22:14 -06:00 |
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Kevin Kim
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b3180d7307
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removed now-redundant zero-extend mux in alu
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2023-02-24 17:14:12 -08:00 |
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Kevin Kim
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0fe1d3b9f3
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took sign extension out of shifter
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2023-02-24 17:09:56 -08:00 |
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David Harris
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db5aa5a0fd
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Merge pull request #114 from ross144/main
Fix the branch predictor's gshare and btb critical path issue
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2023-02-24 16:55:34 -08:00 |
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