Commit Graph

17 Commits

Author SHA1 Message Date
David Harris
0674f5506e moved shared constants to a shared directory 2021-06-03 22:41:30 -04:00
Kip Macsai-Goren
40cfa86935 Edited and added constants to support SV48 2021-06-01 17:49:45 -04:00
Elizabeth Hedenberg
2d1d929485 coremark print statment 2021-05-03 19:35:08 -04:00
Ross Thompson
72363f5c66 Added the ability to exclude branch predictor. 2021-04-26 14:27:42 -05:00
Ross Thompson
6e803b724e Merge branch 'tests' into icache-almost-working 2021-04-25 21:25:36 -05:00
Noah Boorstin
6954e6df4c buildroot: sim is now running!
yes it only gets through 5 instructions right now. Yes that's my fault.
2021-04-17 14:44:32 -04:00
Thomas Fleming
303c2c4839 Implement support for superpages 2021-04-08 02:44:59 -04:00
bbracker
31c6b2d01f Yee hoo first draft of PLIC plus self-checking tests 2021-04-04 06:40:53 -04:00
Teo Ene
7c364a26e9 Updated MISA in coremark_bare config file 2021-03-31 20:39:02 -05:00
Ross Thompson
a64a37d702 Merge of main with the new icache and the branch predictor. I believe there is a bug in the icache with unaligned memory access. The second part of the access is incorrectly relying on the PCF being the address of the next two bytes of the instruction. However this is not always the case as the branch predictor can get the wrong target address. The icache needs to generate the +2 address internally. 2021-03-30 23:18:20 -05:00
Teo Ene
385ce9a8f9 Added BPTYPE to coremark_bare config 2021-03-24 16:38:29 -05:00
bbracker
11d4a8ab34 first pass at PLIC interface 2021-03-22 10:14:21 -04:00
Noah Boorstin
bc1a0c6ee7 change ifndef to generate/if 2021-03-18 12:50:19 -04:00
Noah Boorstin
a2b0af460e everyone gets a bootram 2021-03-18 12:35:37 -04:00
Teo Ene
d72d774a0b addition to last commit 2021-03-17 14:52:31 -05:00
Elizabeth Hedenberg
d0ddb5f461 replicating coremark changes into coremark bare 2021-03-17 14:36:34 -04:00
Teo Ene
396dc61564 Linux CoreMark and baremetal CoreMark split into two separate tests/configs 2021-03-04 07:44:33 -06:00