Ross Thompson
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d23b860c96
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Moved LRU and storage for the LRU into a single module. Also found a subtle bug with the update address used to write the cache's memory.
This was correct for the LRU but incorrect for the data, tag, valid, and dirty storage.
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2021-08-25 21:09:42 -05:00 |
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David Harris
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3fa55a01f4
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simplified or_rows generation and renamed oneHotDecoder to onehotdecoder
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2021-08-25 06:46:41 -04:00 |
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Ross Thompson
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25a8920a69
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Tested all numbers of ways for dcache 1, 2, 4, and 8.
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2021-07-22 10:38:07 -05:00 |
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Ross Thompson
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5860f147d4
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4 way set associative is now working.
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2021-07-21 14:01:14 -05:00 |
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Ross Thompson
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3f780f012a
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Finally fixed bug with the set associative design. The issue was not in the LRU but instead in the way selection mux.
Also forgot to include cacheLRU.sv file.
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2021-07-20 23:17:42 -05:00 |
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