forked from Github_Repos/cvw
Removed clear from TLBLRU because there is no need to flush LRU state and it causes coverage issues
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@ -50,7 +50,5 @@ module tlblru #(parameter TLB_ENTRIES = 8) (
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assign RUBitsAccessed = AccessLines | RUBits;
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assign RUBitsAccessed = AccessLines | RUBits;
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assign AllUsed = &RUBitsAccessed; // if all recently used, then clear to none
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assign AllUsed = &RUBitsAccessed; // if all recently used, then clear to none
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assign RUBitsNext = AllUsed ? 0 : RUBitsAccessed;
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assign RUBitsNext = AllUsed ? 0 : RUBitsAccessed;
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flopenr #(TLB_ENTRIES) lrustate(clk, reset, (CAMHit | TLBWrite), RUBitsNext, RUBits);
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// enable must be ORd with TLBFlush to ensure flop fires on a flush. DH 7/8/21
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flopenrc #(TLB_ENTRIES) lrustate(clk, reset, TLBFlush, (CAMHit | TLBWrite), RUBitsNext, RUBits);
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endmodule
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endmodule
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