Xavi/cvw
1
0
Fork 0
forked from Github_Repos/cvw
Code Issues Pull Requests Packages Projects Releases Wiki Activity

disabled Verilator WIDTH warnings in ICCacheCntrl

Browse Source
This commit is contained in:
David Harris 2021-06-12 19:50:06 -04:00
parent 11c88c15d5
commit c6ff11c22e
1 changed files with 4 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
wally-pipelined/src/cache/ICacheCntrl.sv vendored
View File

@ -188,7 +188,9 @@ module ICacheCntrl #(parameter BLOCKLEN = 256) (
assign spill = PCPF[4:1] == 4'b1111 ? 1'b1 : 1'b0;
assign hit = ICacheMemReadValid; // note ICacheMemReadValid is hit.
// verilator lint_off WIDTH
assign FetchCountFlag = (FetchCount == FetchCountThreshold);
// verilator lint_on WIDTH
// Next state logic
always_comb begin
@ -396,7 +398,9 @@ module ICacheCntrl #(parameter BLOCKLEN = 256) (
logic [`XLEN-1:OFFSETWIDTH-LOGWPL] PCPTrunkExtF, InstrPAdrTrunkF ;
assign PCPTrunkExtF = {PCPTrunkF, {{LOGWPL}{1'b0}}};
// verilator lint_off WIDTH
assign InstrPAdrTrunkF = PCPTrunkExtF + FetchCount;
// verilator lint_on WIDTH
//assign InstrPAdrF = {{PCPTrunkF, {{LOGWPL}{1'b0}}} + FetchCount, {{OFFSETWIDTH-LOGWPL}{1'b0}}};
assign InstrPAdrF = {InstrPAdrTrunkF, {{OFFSETWIDTH-LOGWPL}{1'b0}}};