This commit is contained in:
Noah Limpert 2021-11-17 13:04:33 -08:00
commit bbd17e730b
2 changed files with 29 additions and 3 deletions

26
Makefile Normal file
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make all: submodules other
submodules: addins/riscv-isa-sim addins/riscv-arch-test
cd addins;git init; git submodule add https://github.com/riscv-non-isa/riscv-arch-test; git submodule add https://github.com/riscv-software-src/riscv-isa-sim
git submodule update --init --recursive
other:
cp -r addins/riscv-isa-sim/arch_test_target/spike/device/rv32i_m/I addins/riscv-isa-sim/arch_test_target/spike/device/rv32i_m/F
cp -r addins/riscv-isa-sim/arch_test_target/spike/device/rv32i_m/I addins/riscv-isa-sim/arch_test_target/spike/device/rv32i_m/D
sed -i 's/--isa=rv32i /--isa=32if/' addins/riscv-isa-sim/arch_test_target/spike/device/rv32i_m/F/Makefile.include
sed -i 's/--isa=rv32i /--isa=32if/' addins/riscv-isa-sim/arch_test_target/spike/device/rv32i_m/D/Makefile.include
ifneq ("$(wildcard $(addins/riscv-isa-sim/build/.*))",)
else
mkdir addins/riscv-isa-sim/build
endif
cd addins/riscv-isa-sim/build; ../configure --prefix=/cad/riscv/gcc/bin
make -C addins/riscv-isa-sim/
sed -i '/export TARGETDIR ?=/c\export TARGETDIR ?= /home/harris/riscv-wally/addins/riscv-isa-sim/arch_test_target' tests/wally-riscv-arch-test/Makefile.include
echo export RISCV_PREFIX = riscv64-unknown-elf- >> tests/wally-riscv-arch-test/Makefile.include
make -C tests/wally-riscv-arch-test
make -C tests/wally-riscv-arch-test XLEN=32
cd tests/wally-riscv-arch-test; exe2memfile.pl work/*/*/*.elf
make -C wally-pipelined/regression

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make all:
make ../../tests/imperas-riscv-tests/
make ../../tests/wally-riscv-arch-test/
make XLEN=32 ../../tests/wally-riscv-arch-test/
make -C ../../tests/imperas-riscv-tests/
make -C ../../tests/wally-riscv-arch-test/
make -C XLEN=32 ../../tests/wally-riscv-arch-test/
exe2memfile.pl ../../tests/wally-riscv-arch-test/work/*/*/*.elf
cd ../../tests/linux-testgen/linux-testvectors/;./tvLinker.sh