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Found the performance bug with the branch predictor btb power saving update.

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This commit is contained in:
Ross Thompson 2023-02-28 15:57:34 -06:00
parent 8af61c0cc0
commit 87013ccaf0
3 changed files with 6 additions and 4 deletions
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4
src/ifu/bpred/bpred.sv
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@ -98,6 +98,8 @@ module bpred (
logic WrongBPReturnD;
logic [`XLEN-1:0] BTAE;
// Part 1 branch direction prediction
// look into the 2 port Sram model. something is wrong.
if (`BPRED_TYPE == "BP_TWOBIT") begin:Predictor
@ -161,7 +163,7 @@ module bpred (
icpred #(`INSTR_CLASS_PRED) icpred(.clk, .reset, .StallF, .StallD, .StallE, .StallM, .StallW, .FlushD, .FlushE, .FlushM, .FlushW,
.PostSpillInstrRawF, .InstrD, .BranchD, .BranchE, .JumpD, .JumpE, .BranchM, .BranchW, .JumpM, .JumpW,
.CallD, .CallE, .CallM, .CallW, .ReturnD, .ReturnE, .ReturnM, .ReturnW, .BTBCallF, .BTBReturnF, .BTBJumpF,
.BTBBranchF, .BPCallF, .BPReturnF, .BPJumpF, .BPBranchF, .PredictionInstrClassWrongM, .WrongBPReturnD);
.BTBBranchF, .BPCallF, .BPReturnF, .BPJumpF, .BPBranchF, .PredictionInstrClassWrongM, .AnyWrongPredInstrClassE, .WrongBPReturnD);
// Part 3 RAS
RASPredictor RASPredictor(.clk, .reset, .StallF, .StallD, .StallE, .StallM, .FlushD, .FlushE, .FlushM,

2
src/ifu/bpred/btb.sv
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@ -97,7 +97,7 @@ module btb #(parameter Depth = 10 ) (
// An optimization may be using a PC relative address.
ram2p1r1wbe #(2**Depth, `XLEN+4) memory(
.clk, .ce1(~StallF | reset), .ra1(PCNextFIndex), .rd1(TableBTBPredF),
.ce2(~StallW & ~FlushW), .wa2(PCMIndex), .wd2({InstrClassM, IEUAdrM}), .we2(UpdateEn), .bwe2('1));
.ce2(~StallW & ~FlushW), .wa2(PCMIndex), .wd2({InstrClassM, IEUAdrM}), .we2(BTBWrongM), .bwe2('1));
assign UpdateEn = |InstrClassM | PredictionInstrClassWrongM;

4
src/ifu/bpred/icpred.sv
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@ -42,10 +42,10 @@ module icpred #(parameter INSTR_CLASS_PRED = 1)(
output logic ReturnD, ReturnE, ReturnM, ReturnW,
input logic BTBCallF, BTBReturnF, BTBJumpF, BTBBranchF,
output logic BPCallF, BPReturnF, BPJumpF, BPBranchF,
output logic PredictionInstrClassWrongM, WrongBPReturnD
output logic PredictionInstrClassWrongM, WrongBPReturnD, AnyWrongPredInstrClassE
);
logic AnyWrongPredInstrClassD, AnyWrongPredInstrClassE;
logic AnyWrongPredInstrClassD;
logic BPBranchD, BPJumpD, BPReturnD, BPCallD;
if (!INSTR_CLASS_PRED) begin : DirectClassDecode