forked from Github_Repos/cvw
privileged pc mux cleanup.
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@ -100,8 +100,8 @@ module csr #(parameter
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logic [`XLEN-1:0] TVec, TrapVector, NextFaultMtvalM;
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logic MTrapM, STrapM;
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logic [`XLEN-1:0] PrivilegedNextPCM;
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logic [`XLEN-1:0] XEPC_REG;
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logic RetM;
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logic InstrValidNotFlushedM;
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assign InstrValidNotFlushedM = ~StallW & ~FlushW;
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@ -146,14 +146,10 @@ module csr #(parameter
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assign TrapVector = {TVec[`XLEN-1:2], 2'b00};
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end
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always_comb
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if (TrapM) PrivilegedNextPCM = TrapVector;
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else if (mretM) PrivilegedNextPCM = MEPC_REGW;
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else PrivilegedNextPCM = SEPC_REGW;
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logic PrivilegedChangePCM;
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assign PrivilegedChangePCM = mretM | sretM | TrapM;
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mux2 #(`XLEN) pcmux3(.d0(PCNext2F), .d1(PrivilegedNextPCM), .s(PrivilegedChangePCM), .y(UnalignedPCNextF));
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assign RetM = mretM | sretM;
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mux2 #(`XLEN) xepcMux(SEPC_REGW, MEPC_REGW, mretM, XEPC_REG);
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mux3 #(`XLEN) pcmux3(PCNext2F, XEPC_REG, TrapVector, {TrapM, RetM}, UnalignedPCNextF);
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///////////////////////////////////////////
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// CSRWriteValM
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