Renamed regression to sim

.gitignore

@@ -42,8 +42,8 @@ tests/linux-testgen/buildroot-image-output
 tests/linux-testgen/buildroot-config-src/main.config.old
 tests/linux-testgen/buildroot-config-src/linux.config.old
 tests/linux-testgen/buildroot-config-src/busybox.config.old
-regression/slack-notifier/slack-webhook-url.txt
-regression/logs
+sim/slack-notifier/slack-webhook-url.txt
+sim/logs
 fpga/generator/IP
 fpga/generator/vivado.*
 fpga/generator/.Xil/*
@@ -79,24 +79,24 @@ synthDC/ppa/plots
 synthDC/wallyplots/
 synthDC/runArchive
 synthDC/hdl
-regression/power.saif
+sim/power.saif
 tests/fp/vectors/*.tv
 synthDC/Summary.csv
-regression/wkdir
+sim/wkdir
 tests/custom/work
 tests/custom/*/*/*.list
 tests/custom/*/*/*.elf
 tests/custom/*/*/*.map
 tests/custom/*/*/*.memfile
 tests/custom/crt0/*.a
-regression/sd_model.log
+sim/sd_model.log
 fpga/src/sdc/*
 fpga/src/sdc.tar.gz
 fpga/src/CopiedFiles_do_not_add_to_repo/*
-regression/branch.log
+sim/branch.log
 /fpga/generator/sim/imp-funcsim.v
 /fpga/generator/sim/imp-timesim.sdf
 /fpga/generator/sim/imp-timesim.v
 /fpga/generator/sim/syn-funcsim.v
 external
-regression/results
+sim/results

Install

@@ -328,6 +328,6 @@ source ./setup.sh        # may require some modification for your system. Always
 
   cd <to location of repo clone>
   make
-  cd regression
+  cd sim
   ./regression-wally       #(depends on having Questa installed)
 

Makefile

@@ -15,8 +15,8 @@ install:
 	##ln -s ${RISCV}/imperas-riscv-tests/riscv-ovpsim-plus/bin/Linux64/riscvOVPsimPlus.exe tests/imperas-riscv-tests/riscv-ovpsim-plus/bin/Linux64/riscvOVPsimPlus.exe
 
 regression:
-	make -C regression
+	make -C sim
 
 clean:
-	make clean -C regression
+	make clean -C sim
 

README.md

@@ -53,7 +53,7 @@ Edit setup.sh and change the following lines to point to the path and license se
 
 Run a regression simulation with Questa to prove everything is installed.
 
-	$ cd regression
+	$ cd sim
 	$ ./regression-wally       (depends on having Questa installed)
 
 # Toolchain Installation (Sys Admin)

benchmarks/coremark/Makefile

@@ -21,8 +21,8 @@ PORT_CFLAGS = -g -mabi=$(ABI) -march=$(ARCH) -static -falign-functions=16 \
 all: $(work_dir)/coremark.bare.riscv.elf.memfile
 
 run:
-	(cd ../../regression && (time vsim -c -do "do wally-pipelined-batch.do rv$(XLEN)gc coremark" 2>&1 | tee $(work_dir)/coremark.sim.log))
-	cd ../../benchmarks/coremark/
+	(cd ../../sim && (time vsim -c -do "do wally-pipelined-batch.do rv$(XLEN)gc coremark" 2>&1 | tee $(work_dir)/coremark.sim.log))
+	cd ../benchmarks/coremark/
 #	KMG: added post processing script to give out branch miss proportion along with other stats to the coremark test
 	python3 coremark-postprocess.py
 

benchmarks/embench/Makefile

@@ -34,7 +34,7 @@ sim: modelsim_build_memfile modelsim_run speed
 
 # launches modelsim to simulate tests on wally
 modelsim_run:
-	(cd ../../regression/ && vsim -c -do "do wally-pipelined-batch.do rv32gc embench")
+	(cd ../../sim/ && vsim -c -do "do wally-pipelined-batch.do rv32gc embench")
 	cd ../../benchmarks/embench/
 
 # builds the objdump based on the compiled c elf files

setup.imperas.sh

@@ -31,7 +31,7 @@ export IMPERAS_PERSONALITY=CPUMAN_DV_ASYNC
 # setup QUESTA (Imperas only command, YMMV)
 svsetup -questa
 
-pushd regression
+pushd sim
     # With IDV
     IMPERAS_TOOLS=$(pwd)/imperas.ic \
         OTHERFLAGS="+TRACE2LOG_ENABLE=1 VERBOSE=1" \

sim/Makefile

@@ -2,27 +2,27 @@ all: riscoftests memfiles
 	# *** Build old tests/imperas-riscv-tests for now;
 	# Delete this part when the privileged tests transition over to tests/wally-riscv-arch-test
 	# DH: 2/27/22 temporarily commented out imperas-riscv-tests because license expired
-	#make -C ../../tests/imperas-riscv-tests --jobs
-	#make -C ../../tests/imperas-riscv-tests XLEN=64 --jobs
+	#make -C ../tests/imperas-riscv-tests --jobs
+	#make -C ../tests/imperas-riscv-tests XLEN=64 --jobs
 	# Only compile Imperas tests if they are installed locally.  
 	# They are usually a symlink to $RISCV/imperas-riscv-tests and only 
 	# get compiled there manually during installation
-	#make -C ../../addins/imperas-riscv-tests
-	#make -C ../../addins/imperas-riscv-tests XLEN=64
-	#cd ../../addins/imperas-riscv-tests; elf2hex.sh
-	#cd ../../addins/imperas-riscv-tests; extractFunctionRadix.sh work/*/*/*.elf.objdump
+	#make -C ../addins/imperas-riscv-tests
+	#make -C ../addins/imperas-riscv-tests XLEN=64
+	#cd ../addins/imperas-riscv-tests; elf2hex.sh
+	#cd ../addins/imperas-riscv-tests; extractFunctionRadix.sh work/*/*/*.elf.objdump
 	# Link Linux test vectors 
-	#cd ../../tests/linux-testgen/linux-testvectors/;./tvLinker.sh
+	#cd ../tests/linux-testgen/linux-testvectors/;./tvLinker.sh
 
 allclean: clean all
 
 clean:
-	make clean -C ../../tests/riscof
+	make clean -C ../tests/riscof
 #   make clean -C ../../tests/wally-riscv-arch-test
 #	make allclean -C ../../tests/imperas-riscv-tests
 
 riscoftests: 
 # 	Builds riscv-arch-test 64 and 32-bit versions and builds wally-riscv-arch-test 64 and 32-bit versions
-	make -C ../../tests/riscof/ 
+	make -C ../tests/riscof/ 
 memfiles:
 	make -f makefile-memfile wally-sim-files --jobs

sim/makefile-memfile

@@ -1,4 +1,4 @@
-ROOT	:= ../..
+ROOT	:= ..
 SUFFIX	:= work
 ARCHDIR	:= $(ROOT)/tests/riscof
 WALLYDIR:= $(ROOT)/tests/wally-riscv-arch-test

synthDC/Makefile

@@ -102,11 +102,11 @@ endif
 	sed -i 's/ZICSR_SUPPORTED *1/ZICSR_SUPPORTED 0/' $(CONFIGDIR)/$@_noPriv/wally-config.vh
 
 ifeq ($(SAIFPOWER), 1)
-	cp -f ../regression/power.saif .
+	cp -f ../sim/power.saif .
 endif
 
 ifeq ($(SAIFPOWER), 1)
-	cp -f ../regression/power.saif .
+	cp -f ../sim/power.saif .
 endif
 
 freqs: 

tests/testgen/privileged/run.sh

@@ -48,7 +48,7 @@ fi
 if [[ "$2" == "-sim" || "$2" == "-simonly" ]]
 then
 	printf "\n\n\n#####\nSimulating!\n#####\n\n"
-	cd $WALLY/regression
+	cd $WALLY/sim
 	vsim -do wally-privileged.do -c
 fi