diff --git a/.gitignore b/.gitignore index b389dd1d..5619adbf 100644 --- a/.gitignore +++ b/.gitignore @@ -42,8 +42,8 @@ tests/linux-testgen/buildroot-image-output tests/linux-testgen/buildroot-config-src/main.config.old tests/linux-testgen/buildroot-config-src/linux.config.old tests/linux-testgen/buildroot-config-src/busybox.config.old -regression/slack-notifier/slack-webhook-url.txt -regression/logs +sim/slack-notifier/slack-webhook-url.txt +sim/logs fpga/generator/IP fpga/generator/vivado.* fpga/generator/.Xil/* @@ -79,24 +79,24 @@ synthDC/ppa/plots synthDC/wallyplots/ synthDC/runArchive synthDC/hdl -regression/power.saif +sim/power.saif tests/fp/vectors/*.tv synthDC/Summary.csv -regression/wkdir +sim/wkdir tests/custom/work tests/custom/*/*/*.list tests/custom/*/*/*.elf tests/custom/*/*/*.map tests/custom/*/*/*.memfile tests/custom/crt0/*.a -regression/sd_model.log +sim/sd_model.log fpga/src/sdc/* fpga/src/sdc.tar.gz fpga/src/CopiedFiles_do_not_add_to_repo/* -regression/branch.log +sim/branch.log /fpga/generator/sim/imp-funcsim.v /fpga/generator/sim/imp-timesim.sdf /fpga/generator/sim/imp-timesim.v /fpga/generator/sim/syn-funcsim.v external -regression/results +sim/results diff --git a/Install b/Install index 46f4d78e..47a91ddd 100644 --- a/Install +++ b/Install @@ -328,6 +328,6 @@ source ./setup.sh # may require some modification for your system. Always cd make - cd regression + cd sim ./regression-wally #(depends on having Questa installed) diff --git a/Makefile b/Makefile index 24ba57e5..1f540b56 100644 --- a/Makefile +++ b/Makefile @@ -15,8 +15,8 @@ install: ##ln -s ${RISCV}/imperas-riscv-tests/riscv-ovpsim-plus/bin/Linux64/riscvOVPsimPlus.exe tests/imperas-riscv-tests/riscv-ovpsim-plus/bin/Linux64/riscvOVPsimPlus.exe regression: - make -C regression + make -C sim clean: - make clean -C regression + make clean -C sim diff --git a/README.md b/README.md index 824c7c17..ce92151e 100644 --- a/README.md +++ b/README.md @@ -53,7 +53,7 @@ Edit setup.sh and change the following lines to point to the path and license se Run a regression simulation with Questa to prove everything is installed. - $ cd regression + $ cd sim $ ./regression-wally (depends on having Questa installed) # Toolchain Installation (Sys Admin) diff --git a/benchmarks/coremark/Makefile b/benchmarks/coremark/Makefile index b8235ea9..e0aa6661 100644 --- a/benchmarks/coremark/Makefile +++ b/benchmarks/coremark/Makefile @@ -21,8 +21,8 @@ PORT_CFLAGS = -g -mabi=$(ABI) -march=$(ARCH) -static -falign-functions=16 \ all: $(work_dir)/coremark.bare.riscv.elf.memfile run: - (cd ../../regression && (time vsim -c -do "do wally-pipelined-batch.do rv$(XLEN)gc coremark" 2>&1 | tee $(work_dir)/coremark.sim.log)) - cd ../../benchmarks/coremark/ + (cd ../../sim && (time vsim -c -do "do wally-pipelined-batch.do rv$(XLEN)gc coremark" 2>&1 | tee $(work_dir)/coremark.sim.log)) + cd ../benchmarks/coremark/ # KMG: added post processing script to give out branch miss proportion along with other stats to the coremark test python3 coremark-postprocess.py diff --git a/benchmarks/embench/Makefile b/benchmarks/embench/Makefile index b5030d11..0d619c90 100644 --- a/benchmarks/embench/Makefile +++ b/benchmarks/embench/Makefile @@ -34,7 +34,7 @@ sim: modelsim_build_memfile modelsim_run speed # launches modelsim to simulate tests on wally modelsim_run: - (cd ../../regression/ && vsim -c -do "do wally-pipelined-batch.do rv32gc embench") + (cd ../../sim/ && vsim -c -do "do wally-pipelined-batch.do rv32gc embench") cd ../../benchmarks/embench/ # builds the objdump based on the compiled c elf files diff --git a/setup.imperas.sh b/setup.imperas.sh index 4e30fb07..755a298b 100644 --- a/setup.imperas.sh +++ b/setup.imperas.sh @@ -31,7 +31,7 @@ export IMPERAS_PERSONALITY=CPUMAN_DV_ASYNC # setup QUESTA (Imperas only command, YMMV) svsetup -questa -pushd regression +pushd sim # With IDV IMPERAS_TOOLS=$(pwd)/imperas.ic \ OTHERFLAGS="+TRACE2LOG_ENABLE=1 VERBOSE=1" \ diff --git a/regression/Makefile b/sim/Makefile similarity index 62% rename from regression/Makefile rename to sim/Makefile index adc7bc71..6a917bcd 100644 --- a/regression/Makefile +++ b/sim/Makefile @@ -2,27 +2,27 @@ all: riscoftests memfiles # *** Build old tests/imperas-riscv-tests for now; # Delete this part when the privileged tests transition over to tests/wally-riscv-arch-test # DH: 2/27/22 temporarily commented out imperas-riscv-tests because license expired - #make -C ../../tests/imperas-riscv-tests --jobs - #make -C ../../tests/imperas-riscv-tests XLEN=64 --jobs + #make -C ../tests/imperas-riscv-tests --jobs + #make -C ../tests/imperas-riscv-tests XLEN=64 --jobs # Only compile Imperas tests if they are installed locally. # They are usually a symlink to $RISCV/imperas-riscv-tests and only # get compiled there manually during installation - #make -C ../../addins/imperas-riscv-tests - #make -C ../../addins/imperas-riscv-tests XLEN=64 - #cd ../../addins/imperas-riscv-tests; elf2hex.sh - #cd ../../addins/imperas-riscv-tests; extractFunctionRadix.sh work/*/*/*.elf.objdump + #make -C ../addins/imperas-riscv-tests + #make -C ../addins/imperas-riscv-tests XLEN=64 + #cd ../addins/imperas-riscv-tests; elf2hex.sh + #cd ../addins/imperas-riscv-tests; extractFunctionRadix.sh work/*/*/*.elf.objdump # Link Linux test vectors - #cd ../../tests/linux-testgen/linux-testvectors/;./tvLinker.sh + #cd ../tests/linux-testgen/linux-testvectors/;./tvLinker.sh allclean: clean all clean: - make clean -C ../../tests/riscof + make clean -C ../tests/riscof # make clean -C ../../tests/wally-riscv-arch-test # make allclean -C ../../tests/imperas-riscv-tests riscoftests: # Builds riscv-arch-test 64 and 32-bit versions and builds wally-riscv-arch-test 64 and 32-bit versions - make -C ../../tests/riscof/ + make -C ../tests/riscof/ memfiles: make -f makefile-memfile wally-sim-files --jobs diff --git a/regression/buildrootBugFinder.py b/sim/buildrootBugFinder.py similarity index 100% rename from regression/buildrootBugFinder.py rename to sim/buildrootBugFinder.py diff --git a/regression/fpga-wave.do b/sim/fpga-wave.do similarity index 100% rename from regression/fpga-wave.do rename to sim/fpga-wave.do diff --git a/regression/imperas.ic b/sim/imperas.ic similarity index 100% rename from regression/imperas.ic rename to sim/imperas.ic diff --git a/regression/lint-wally b/sim/lint-wally similarity index 100% rename from regression/lint-wally rename to sim/lint-wally diff --git a/regression/linux-wave.do b/sim/linux-wave.do similarity index 100% rename from regression/linux-wave.do rename to sim/linux-wave.do diff --git a/regression/make-tests.sh b/sim/make-tests.sh similarity index 100% rename from regression/make-tests.sh rename to sim/make-tests.sh diff --git a/regression/makefile-memfile b/sim/makefile-memfile similarity index 99% rename from regression/makefile-memfile rename to sim/makefile-memfile index 646da5ac..6c2da42f 100644 --- a/regression/makefile-memfile +++ b/sim/makefile-memfile @@ -1,4 +1,4 @@ -ROOT := ../.. +ROOT := .. SUFFIX := work ARCHDIR := $(ROOT)/tests/riscof WALLYDIR:= $(ROOT)/tests/wally-riscv-arch-test diff --git a/regression/regression-wally b/sim/regression-wally similarity index 100% rename from regression/regression-wally rename to sim/regression-wally diff --git a/regression/run-imperasdv-tests.bash b/sim/run-imperasdv-tests.bash similarity index 100% rename from regression/run-imperasdv-tests.bash rename to sim/run-imperasdv-tests.bash diff --git a/regression/sim-buildroot b/sim/sim-buildroot similarity index 100% rename from regression/sim-buildroot rename to sim/sim-buildroot diff --git a/regression/sim-buildroot-batch b/sim/sim-buildroot-batch similarity index 100% rename from regression/sim-buildroot-batch rename to sim/sim-buildroot-batch diff --git a/regression/sim-imperas b/sim/sim-imperas similarity index 100% rename from regression/sim-imperas rename to sim/sim-imperas diff --git a/regression/sim-testfloat b/sim/sim-testfloat similarity index 100% rename from regression/sim-testfloat rename to sim/sim-testfloat diff --git a/regression/sim-testfloat-batch b/sim/sim-testfloat-batch similarity index 100% rename from regression/sim-testfloat-batch rename to sim/sim-testfloat-batch diff --git a/regression/sim-wally b/sim/sim-wally similarity index 100% rename from regression/sim-wally rename to sim/sim-wally diff --git a/regression/sim-wally-batch b/sim/sim-wally-batch similarity index 100% rename from regression/sim-wally-batch rename to sim/sim-wally-batch diff --git a/regression/slack-notifier/slack-notifier.py b/sim/slack-notifier/slack-notifier.py similarity index 100% rename from regression/slack-notifier/slack-notifier.py rename to sim/slack-notifier/slack-notifier.py diff --git a/regression/test b/sim/test similarity index 100% rename from regression/test rename to sim/test diff --git a/regression/testfloat.do b/sim/testfloat.do similarity index 100% rename from regression/testfloat.do rename to sim/testfloat.do diff --git a/regression/wally-pipelined-batch.do b/sim/wally-pipelined-batch.do similarity index 100% rename from regression/wally-pipelined-batch.do rename to sim/wally-pipelined-batch.do diff --git a/regression/wally-pipelined-imperas-no-idv.do b/sim/wally-pipelined-imperas-no-idv.do similarity index 100% rename from regression/wally-pipelined-imperas-no-idv.do rename to sim/wally-pipelined-imperas-no-idv.do diff --git a/regression/wally-pipelined-imperas.do b/sim/wally-pipelined-imperas.do similarity index 100% rename from regression/wally-pipelined-imperas.do rename to sim/wally-pipelined-imperas.do diff --git a/regression/wally-pipelined.do b/sim/wally-pipelined.do similarity index 100% rename from regression/wally-pipelined.do rename to sim/wally-pipelined.do diff --git a/regression/wave-all.do b/sim/wave-all.do similarity index 100% rename from regression/wave-all.do rename to sim/wave-all.do diff --git a/regression/wave-dos/ahb-muldiv.do b/sim/wave-dos/ahb-muldiv.do similarity index 100% rename from regression/wave-dos/ahb-muldiv.do rename to sim/wave-dos/ahb-muldiv.do diff --git a/regression/wave-dos/ahb-waves.do b/sim/wave-dos/ahb-waves.do similarity index 100% rename from regression/wave-dos/ahb-waves.do rename to sim/wave-dos/ahb-waves.do diff --git a/regression/wave-dos/cache-waves.do b/sim/wave-dos/cache-waves.do similarity index 100% rename from regression/wave-dos/cache-waves.do rename to sim/wave-dos/cache-waves.do diff --git a/regression/wave-dos/default-waves.do b/sim/wave-dos/default-waves.do similarity index 100% rename from regression/wave-dos/default-waves.do rename to sim/wave-dos/default-waves.do diff --git a/regression/wave-dos/generic.do b/sim/wave-dos/generic.do similarity index 100% rename from regression/wave-dos/generic.do rename to sim/wave-dos/generic.do diff --git a/regression/wave-dos/linux-waves.do b/sim/wave-dos/linux-waves.do similarity index 100% rename from regression/wave-dos/linux-waves.do rename to sim/wave-dos/linux-waves.do diff --git a/regression/wave-dos/peripheral-waves.do b/sim/wave-dos/peripheral-waves.do similarity index 100% rename from regression/wave-dos/peripheral-waves.do rename to sim/wave-dos/peripheral-waves.do diff --git a/regression/wave-fpu.do b/sim/wave-fpu.do similarity index 100% rename from regression/wave-fpu.do rename to sim/wave-fpu.do diff --git a/regression/wave.do b/sim/wave.do similarity index 100% rename from regression/wave.do rename to sim/wave.do diff --git a/synthDC/Makefile b/synthDC/Makefile index 7ef29543..f13b38ab 100755 --- a/synthDC/Makefile +++ b/synthDC/Makefile @@ -102,11 +102,11 @@ endif sed -i 's/ZICSR_SUPPORTED *1/ZICSR_SUPPORTED 0/' $(CONFIGDIR)/$@_noPriv/wally-config.vh ifeq ($(SAIFPOWER), 1) - cp -f ../regression/power.saif . + cp -f ../sim/power.saif . endif ifeq ($(SAIFPOWER), 1) - cp -f ../regression/power.saif . + cp -f ../sim/power.saif . endif freqs: diff --git a/tests/testgen/privileged/run.sh b/tests/testgen/privileged/run.sh index 414f4f2d..d1afb4e8 100755 --- a/tests/testgen/privileged/run.sh +++ b/tests/testgen/privileged/run.sh @@ -48,7 +48,7 @@ fi if [[ "$2" == "-sim" || "$2" == "-simonly" ]] then printf "\n\n\n#####\nSimulating!\n#####\n\n" - cd $WALLY/regression + cd $WALLY/sim vsim -do wally-privileged.do -c fi