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Renamed special case

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This commit is contained in:
David Harris 2022-08-29 04:29:58 -07:00
parent 81ec1ac858
commit 6961e499dc
1 changed files with 7 additions and 2 deletions
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7
pipelined/src/fpu/fdivsqrtfsm.sv
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@ -65,6 +65,8 @@ module fdivsqrtfsm(
logic WZero;
//logic [$clog2(`DIVLEN/2+3)-1:0] Dur;
logic [`DIVb+3:0] W;
logic SpecialCase;
//flopen #($clog2(`DIVLEN/2+3)) durflop(clk, DivStart, CalcDur, Dur);
assign DivBusy = (state == BUSY);
// calculate sticky bit
@ -90,12 +92,15 @@ module fdivsqrtfsm(
assign NegSticky = W[`DIVb+3];
assign EarlyTermShiftE = step;
// terminate immediately on special cases
assign SpecialCase = XZeroE | (YZeroE&~SqrtE) | XInfE | YInfE | XNaNE | YNaNE | (XsE&SqrtE);
always_ff @(posedge clk) begin
if (reset) begin
state <= #1 IDLE;
end else if (DivStart&~StallE) begin
step <= Dur;
if (XZeroE|(YZeroE&~SqrtE)|XInfE|YInfE|XNaNE|YNaNE|(XsE&SqrtE)) state <= #1 DONE;
if (SpecialCase) state <= #1 DONE;
else state <= #1 BUSY;
end else if (state == BUSY) begin
if ((~|step[`DURLEN-1:1]&step[0])|WZero) begin