forked from Github_Repos/cvw
Removed unused ch5 assembly example
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ch5.debug: ch5
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riscv64-unknown-elf-objdump -D ch5 > ch5.debug
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ch5: ch5.S Makefile
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riscv64-unknown-elf-gcc -nodefaultlibs -nostartfiles -o ch5 ch5.S
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# -ffreestanding
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# -nostdlib
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clean:
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rm -f ch5 ch5.debug
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# ch5.s
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# David_Harris@hmc.edu 14 December 2021
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.section .text.init
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.globl _start
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_start:
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lw x1, 4(x0)
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sw x1, 8(x0)
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add x2, x1, x1
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beq x1, x2, done
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loop:
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jal x0, loop
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done:
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.end
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@ -1,38 +0,0 @@
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ch5: file format elf64-littleriscv
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Disassembly of section .text:
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0000000000010078 <_start>:
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10078: 00402083 lw ra,4(zero) # 4 <_start-0x10074>
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1007c: 00102423 sw ra,8(zero) # 8 <_start-0x10070>
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10080: 00108133 add sp,ra,ra
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10084: 00208463 beq ra,sp,1008c <done>
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0000000000010088 <loop>:
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10088: 0000006f j 10088 <loop>
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Disassembly of section .riscv.attributes:
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0000000000000000 <.riscv.attributes>:
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0: 3241 addiw tp,tp,-16
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2: 0000 unimp
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4: 7200 ld s0,32(a2)
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6: 7369 lui t1,0xffffa
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8: 01007663 bgeu zero,a6,14 <_start-0x10064>
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c: 0028 addi a0,sp,8
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e: 0000 unimp
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10: 7205 lui tp,0xfffe1
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12: 3676 fld fa2,376(sp)
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14: 6934 ld a3,80(a0)
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16: 7032 0x7032
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18: 5f30 lw a2,120(a4)
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1a: 326d addiw tp,tp,-5
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1c: 3070 fld fa2,224(s0)
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1e: 615f 7032 5f30 0x5f307032615f
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24: 3266 fld ft4,120(sp)
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26: 3070 fld fa2,224(s0)
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28: 645f 7032 5f30 0x5f307032645f
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2e: 30703263 0x30703263
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...
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