forked from Github_Repos/cvw
Partitioned privilege mode fsm into new module
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@ -81,8 +81,6 @@ module privileged (
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output logic BreakpointFaultM, EcallFaultM, wfiM, IntPendingM, BigEndianM
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);
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logic [1:0] NextPrivilegeModeM;
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logic [`XLEN-1:0] CauseM, NextFaultMtvalM;
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logic [`XLEN-1:0] MEPC_REGW, SEPC_REGW, STVEC_REGW, MTVEC_REGW;
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logic [`XLEN-1:0] MEDELEG_REGW;
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@ -102,15 +100,18 @@ module privileged (
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logic STATUS_SPP, STATUS_TSR, STATUS_TW, STATUS_TVM;
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logic STATUS_MIE, STATUS_SIE;
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logic [11:0] MIP_REGW, MIE_REGW;
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logic md;
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logic StallMQ;
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logic WFITimeoutM;
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logic [1:0] NextPrivilegeModeM;
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///////////////////////////////////////////
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// track the current privilege level
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///////////////////////////////////////////
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privmode privmode(.clk, .reset, .StallW, .TrapM, .mretM, .sretM, .CauseM,
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.MEDELEG_REGW, .MIDELEG_REGW, .STATUS_MPP, .STATUS_SPP, .NextPrivilegeModeM, .PrivilegeModeW);
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/*
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// get bits of DELEG registers based on CAUSE
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assign md = CauseM[`XLEN-1] ? MIDELEG_REGW[CauseM[3:0]] : MEDELEG_REGW[CauseM[`LOG_XLEN-1:0]];
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@ -129,6 +130,7 @@ module privileged (
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end
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flopenl #(2) privmodereg(clk, reset, ~StallW, NextPrivilegeModeM, `M_MODE, PrivilegeModeW);
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*/
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///////////////////////////////////////////
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// WFI timeout Privileged Spec 3.1.6.5
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66
pipelined/src/privileged/privmode.sv
Normal file
66
pipelined/src/privileged/privmode.sv
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@ -0,0 +1,66 @@
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///////////////////////////////////////////
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// privmode.sv
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//
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// Written: David_Harris@hmc.edu 12 May 2022
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// Modified:
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//
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// Purpose: Track privilege mode
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// See RISC-V Privileged Mode Specification 20190608 3.1.10-11
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//
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// A component of the Wally configurable RISC-V project.
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//
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// Copyright (C) 2021 Harvey Mudd College & Oklahoma State University
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//
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// MIT LICENSE
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// Permission is hereby granted, free of charge, to any person obtaining a copy of this
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// software and associated documentation files (the "Software"), to deal in the Software
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// without restriction, including without limitation the rights to use, copy, modify, merge,
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// publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons
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// to whom the Software is furnished to do so, subject to the following conditions:
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//
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// The above copyright notice and this permission notice shall be included in all copies or
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// substantial portions of the Software.
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//
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// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED,
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// INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
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// PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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// BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
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// TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE
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// OR OTHER DEALINGS IN THE SOFTWARE.
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////////////////////////////////////////////////////////////////////////////////////////////////
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`include "wally-config.vh"
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module privmode (
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input logic clk, reset,
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input logic StallW, TrapM, mretM, sretM,
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input logic [`XLEN-1:0] CauseM, MEDELEG_REGW,
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input logic [11:0] MIDELEG_REGW,
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input logic [1:0] STATUS_MPP,
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input logic STATUS_SPP,
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output logic [1:0] NextPrivilegeModeM, PrivilegeModeW
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);
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if (`U_SUPPORTED) begin:privmode
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logic md;
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// get bits of DELEG registers based on CAUSE
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assign md = CauseM[`XLEN-1] ? MIDELEG_REGW[CauseM[3:0]] : MEDELEG_REGW[CauseM[`LOG_XLEN-1:0]];
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// PrivilegeMode FSM
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always_comb begin
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if (TrapM) begin // Change privilege based on DELEG registers (see 3.1.8)
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if (`S_SUPPORTED & md & (PrivilegeModeW == `U_MODE | PrivilegeModeW == `S_MODE))
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NextPrivilegeModeM = `S_MODE;
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else NextPrivilegeModeM = `M_MODE;
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end else if (mretM) NextPrivilegeModeM = STATUS_MPP;
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else if (sretM) NextPrivilegeModeM = {1'b0, STATUS_SPP};
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else NextPrivilegeModeM = PrivilegeModeW;
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end
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flopenl #(2) privmodereg(clk, reset, ~StallW, NextPrivilegeModeM, `M_MODE, PrivilegeModeW);
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end else begin // only machine mode supported
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assign NextPrivilegeModeM = `M_MODE;
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assign PrivilegeModeW = `M_MODE;
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end
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endmodule
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@ -138,7 +138,7 @@ module testbench;
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`define RF dut.core.ieu.dp.regf.rf
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`define PC dut.core.ifu.pcreg.q
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`define PRIV_BASE dut.core.priv.priv
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`define PRIV `PRIV_BASE.privmodereg.q
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`define PRIV `PRIV_BASE.privmode.privmode.privmodereg.q
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`define CSR_BASE `PRIV_BASE.csr
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`define MEIP `PRIV_BASE.MExtInt
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`define SEIP `PRIV_BASE.SExtInt
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