Merge remote-tracking branch 'origin/main' into cache

wally-pipelined/config/busybear/wally-config.vh

@@ -86,3 +86,6 @@
 
 /* verilator lint_off STMTDLY */
 /* verilator lint_off WIDTH */
+
+`define TWO_BIT_PRELOAD "../config/busybear/twoBitPredictor.txt"
+`define BTB_PRELOAD "../config/busybear/BTBPredictor.txt"

wally-pipelined/config/coremark/wally-config.vh

@@ -88,3 +88,6 @@
 /* verilator lint_off WIDTH */
 /* verilator lint_off ASSIGNDLY */
 /* verilator lint_off PINCONNECTEMPTY */
+
+`define TWO_BIT_PRELOAD "../config/coremark/twoBitPredictor.txt"
+`define BTB_PRELOAD "../config/coremark/BTBPredictor.txt"

wally-pipelined/config/rv32ic/wally-config.vh

@@ -84,3 +84,6 @@
 
 /* verilator lint_off STMTDLY */
 /* verilator lint_off WIDTH */
+
+`define TWO_BIT_PRELOAD "../config/rv32ic/twoBitPredictor.txt"
+`define BTB_PRELOAD "../config/rv32ic/BTBPredictor.txt"

wally-pipelined/config/rv64ic/wally-config.vh

@@ -87,3 +87,6 @@
 /* verilator lint_off WIDTH */
 /* verilator lint_off ASSIGNDLY */
 /* verilator lint_off PINCONNECTEMPTY */
+
+`define TWO_BIT_PRELOAD "../config/rv64ic/twoBitPredictor.txt"
+`define BTB_PRELOAD "../config/rv64ic/BTBPredictor.txt"

wally-pipelined/config/rv64icfd/wally-config.vh

@@ -87,3 +87,6 @@
 /* verilator lint_off WIDTH */
 /* verilator lint_off ASSIGNDLY */
 /* verilator lint_off PINCONNECTEMPTY */
+
+`define TWO_BIT_PRELOAD "../config/rv64icfd/twoBitPredictor.txt"
+`define BTB_PRELOAD "../config/rv64icfd/BTBPredictor.txt"

wally-pipelined/regression/regression-wally.sh

@@ -1,34 +0,0 @@
-#!/usr/bin/env bash
-check_test () {
-  output=$(timeout 2m ./"$1" 2>/dev/null)
-  found=$(echo $output | grep -c "$2")
-  echo "$found"
-}
-echo "-----------------------"
-echo "starting all regression tests!"
-echo "note: this could take up to 3 minutes to run"
-echo "-----------------------"
-echo "checking verilator"
-verilator_out=$(cd ..; ./lint-wally 2>&1)
-[[ -z $verilator_out ]] && echo "verilator passed" || echo "verilator failed"
-echo "starting Imperas rv64ic"
-sleep 1
-exec 3< <(check_test "sim-wally-batch" "All tests ran without failures.")
-#echo "starting Imperas rv32ic"
-#sleep 1
-#exec 5< <(check_test "sim-wally-rv32ic" "All tests ran without failures.")
-#echo "starting busybear"
-sleep 1
-exec 4< <(check_test "sim-busybear-batch" "loaded 100000 instructions")
-echo "-----------------------"
-echo "waiting for tests to finish..."
-echo "-----------------------"
-rv64_out=$(cat <&3)
-[[ $rv64_out -eq 1 ]] && echo "rv64ic passed" || echo "rv64ic failed"
-#rv32_out=$(cat <&5)
-#[[ $rv32_out -eq 1 ]] && echo "rv32ic passed" || echo "rv32ic failed"
-busybear_out=$(cat <&4)
-[[ $busybear_out -eq 1 ]] && echo "busybear passed" || echo "busybear failed"
-
-[[ -z $verilator_out && $rv64_out -eq 1 && $busybear_out -eq 1 ]] && echo "all passed" || echo "not all passed"
-#[[ -z $verilator_out && $rv32_out -eq 1 && $rv64_out -eq 1 && $busybear_out -eq 1 ]] && echo "all passed" || echo "not all passed"

wally-pipelined/regression/wally-busybear-batch.do

@@ -31,16 +31,9 @@ vlog +incdir+../config/busybear ../testbench/*.sv ../src/*/*.sv -suppress 2583
 
 # start and run simulation
 # remove +acc flag for faster sim during regressions if there is no need to access internal signals
-vopt +acc=+/testbench_busybear/dut/hart/ifu/bpred/DirPredictor/memory/memory +acc=+/testbench_busybear/dut/hart/ifu/bpred/TargetPredictor/memory/memory work.testbench_busybear -o workopt 
+vopt work.testbench_busybear -o workopt 
 
 vsim workopt -suppress 8852,12070
-# load the branch predictors with known data. The value of the data is not important for function, but
-# is important for perventing pessimistic x propagation.
-mem load -infile twoBitPredictor.txt -format bin testbench_busybear/dut/hart/ifu/bpred/DirPredictor/memory/memory
-switch $argc {
-    0 {mem load -infile ../config/rv64ic/BTBPredictor.txt -format bin testbench_busybear/dut/hart/ifu/bpred/TargetPredictor/memory/memory}
-    1 {mem load -infile ../config/$1/BTBPredictor.txt -format bin testbench_busybear/dut/hart/ifu/bpred/TargetPredictor/memory/memory}
-}
 
 run -all
 quit

wally-pipelined/regression/wally-busybear.do

@@ -34,13 +34,6 @@ vlog +incdir+../config/busybear ../testbench/*.sv ../src/*/*.sv -suppress 2583
 vopt +acc work.testbench_busybear -o workopt 
 
 vsim workopt -suppress 8852,12070
-# load the branch predictors with known data. The value of the data is not important for function, but
-# is important for perventing pessimistic x propagation.
-mem load -infile twoBitPredictor.txt -format bin testbench_busybear/dut/hart/ifu/bpred/DirPredictor/memory/memory
-switch $argc {
-    0 {mem load -infile ../config/rv64ic/BTBPredictor.txt -format bin testbench_busybear/dut/hart/ifu/bpred/TargetPredictor/memory/memory}
-    1 {mem load -infile ../config/$1/BTBPredictor.txt -format bin testbench_busybear/dut/hart/ifu/bpred/TargetPredictor/memory/memory}
-}
 
 
 view wave

wally-pipelined/regression/wally-coremark.do

@@ -35,14 +35,6 @@ vlog +incdir+../config/coremark ../testbench/testbench-coremark.sv ../src/*/*.sv
 vopt +acc work.testbench -o workopt 
 vsim workopt
 
-# load the branch predictors with known data. The value of the data is not important for function, but
-# is important for perventing pessimistic x propagation.
-mem load -infile twoBitPredictor.txt -format bin testbench/dut/hart/ifu/bpred/DirPredictor/memory/memory
-switch $argc {
-    0 {mem load -infile ../config/rv64ic/BTBPredictor.txt -format bin testbench/dut/hart/ifu/bpred/TargetPredictor/memory/memory}
-    1 {mem load -infile ../config/$1/BTBPredictor.txt -format bin testbench/dut/hart/ifu/bpred/TargetPredictor/memory/memory}
-}
-
 view wave
 
 -- display input and output signals as hexidecimal values

wally-pipelined/regression/wally-peripherals.do

@@ -38,13 +38,6 @@ switch $argc {
 vopt +acc work.testbench -o workopt 
 vsim workopt
 
-# load the branch predictors with known data. The value of the data is not important for function, but
-# is important for perventing pessimistic x propagation.
-mem load -infile twoBitPredictor.txt -format bin testbench/dut/hart/ifu/bpred/DirPredictor/memory/memory
-switch $argc {
-    0 {mem load -infile ../config/rv64ic/BTBPredictor.txt -format bin testbench/dut/hart/ifu/bpred/TargetPredictor/memory/memory}
-    1 {mem load -infile ../config/$1/BTBPredictor.txt -format bin testbench/dut/hart/ifu/bpred/TargetPredictor/memory/memory}
-}
 
 view wave
 do wally-peripherals-signals.do

wally-pipelined/regression/wally-pipelined-batch-parallel.do

@@ -27,20 +27,12 @@ vlib work$2
 # suppress spurious warnngs about 
 # "Extra checking for conflicts with always_comb done at vopt time"
 # because vsim will run vopt
-#vlog +incdir+$1 ../testbench/testbench-imperas.sv ../src/*/*.sv -suppress 2583 -work work$2
+vlog +incdir+$1 ../testbench/testbench-imperas.sv ../testbench/function_radix.sv ../src/*/*.sv -suppress 2583
 
 # start and run simulation
 # remove +acc flag for faster sim during regressions if there is no need to access internal signals
-#vopt +acc=+/testbench/dut/hart/ifu/bpred/DirPredictor/memory/memory +acc=+/testbench/dut/hart/ifu/bpred/TargetPredictor/memory/memory work$2.testbench -o workopt$2
+vopt work.testbench -o workopt
-#vsim workopt$2
+vsim workopt
 
-# load the branch predictors with known data. The value of the data is not important for function, but
+run -all
-# is important for perventing pessimistic x propagation.
+quit
-#mem load -infile twoBitPredictor.txt -format bin testbench/dut/hart/ifu/bpred/DirPredictor/memory/memory
-#switch $argc {
-#    0 {mem load -infile ../config/rv64ic/BTBPredictor.txt -format bin testbench/dut/hart/ifu/bpred/TargetPredictor/memory/memory}
-#    1 {mem load -infile ../config/$1/BTBPredictor.txt -format bin testbench/dut/hart/ifu/bpred/TargetPredictor/memory/memory}
-#}
-
-#run -all
-#quit

wally-pipelined/regression/wally-pipelined-batch.do

@@ -35,16 +35,8 @@ switch $argc {
 }
 # start and run simulation
 # remove +acc flag for faster sim during regressions if there is no need to access internal signals
-vopt +acc=+/testbench/dut/hart/ifu/bpred/DirPredictor/memory/memory +acc=+/testbench/dut/hart/ifu/bpred/TargetPredictor/memory/memory work.testbench -o workopt 
+vopt work.testbench -o workopt 
 vsim workopt
 
-# load the branch predictors with known data. The value of the data is not important for function, but
-# is important for perventing pessimistic x propagation.
-mem load -infile twoBitPredictor.txt -format bin testbench/dut/hart/ifu/bpred/DirPredictor/memory/memory
-switch $argc {
-    0 {mem load -infile ../config/rv64ic/BTBPredictor.txt -format bin testbench/dut/hart/ifu/bpred/TargetPredictor/memory/memory}
-    1 {mem load -infile ../config/$1/BTBPredictor.txt -format bin testbench/dut/hart/ifu/bpred/TargetPredictor/memory/memory}
-}
-
 run -all
 quit

wally-pipelined/regression/wally-pipelined-ross.do

@@ -38,13 +38,6 @@ switch $argc {
 vopt +acc -gDEBUG=1 work.testbench -o workopt 
 vsim workopt
 
-# load the branch predictors with known data. The value of the data is not important for function, but
-# is important for perventing pessimistic x propagation.
-mem load -infile twoBitPredictor.txt -format bin testbench/dut/hart/ifu/bpred/DirPredictor/memory/memory
-switch $argc {
-    0 {mem load -infile ../config/rv64ic/BTBPredictor.txt -format bin testbench/dut/hart/ifu/bpred/TargetPredictor/memory/memory}
-    1 {mem load -infile ../config/$1/BTBPredictor.txt -format bin testbench/dut/hart/ifu/bpred/TargetPredictor/memory/memory}
-}
 
 do wave.do
 add log -r /*

wally-pipelined/regression/wally-pipelined.do

@@ -38,13 +38,6 @@ switch $argc {
 vopt +acc work.testbench -o workopt 
 vsim workopt
 
-# load the branch predictors with known data. The value of the data is not important for function, but
-# is important for perventing pessimistic x propagation.
-mem load -infile twoBitPredictor.txt -format bin testbench/dut/hart/ifu/bpred/DirPredictor/memory/memory
-switch $argc {
-    0 {mem load -infile ../config/rv64ic/BTBPredictor.txt -format bin testbench/dut/hart/ifu/bpred/TargetPredictor/memory/memory}
-    1 {mem load -infile ../config/$1/BTBPredictor.txt -format bin testbench/dut/hart/ifu/bpred/TargetPredictor/memory/memory}
-}
 
 view wave
 

wally-pipelined/testbench/testbench-busybear.sv

@@ -101,6 +101,8 @@ module testbench_busybear();
     $readmemh("/courses/e190ax/busybear_boot/ram.txt", dut.uncore.dtim.RAM);
     $readmemh("/courses/e190ax/busybear_boot/bootmem.txt", dut.imem.bootram, 'h1000 >> 3);
     $readmemh("/courses/e190ax/busybear_boot/ram.txt", dut.imem.RAM);
+    $readmemb(`TWO_BIT_PRELOAD, dut.hart.ifu.bpred.DirPredictor.memory.memory);
+    $readmemb(`BTB_PRELOAD, dut.hart.ifu.bpred.TargetPredictor.memory.memory);
   end
 
   integer warningCount = 0;

wally-pipelined/testbench/testbench-imperas.sv

@@ -471,6 +471,12 @@ string tests32i[] = {
 				  .ProgramLabelMapFile(ProgramLabelMapFile));
   end
 
+  // initialize the branch predictor
+  initial begin
+    $readmemb(`TWO_BIT_PRELOAD, dut.hart.ifu.bpred.DirPredictor.memory.memory);
+    $readmemb(`BTB_PRELOAD, dut.hart.ifu.bpred.TargetPredictor.memory.memory);    
+  end
+  
 endmodule
 
 /* verilator lint_on STMTDLY */