From 806cfc4ea526f8e8c4bea5931f41f263c5e1f240 Mon Sep 17 00:00:00 2001
From: Ross Thompson <stephen.thompson.37@us.af.mil>
Date: Mon, 15 Mar 2021 12:04:59 -0500
Subject: [PATCH 1/4] Fixed the parallel script so the rv64ic passes. rv32ic
 and busybear still have issues.

---
 .../wally-pipelined-batch-parallel.do         | 19 +++++++------------
 1 file changed, 7 insertions(+), 12 deletions(-)

diff --git a/wally-pipelined/regression/wally-pipelined-batch-parallel.do b/wally-pipelined/regression/wally-pipelined-batch-parallel.do
index 0c3ef725..c4202edb 100644
--- a/wally-pipelined/regression/wally-pipelined-batch-parallel.do
+++ b/wally-pipelined/regression/wally-pipelined-batch-parallel.do
@@ -27,20 +27,15 @@ vlib work$2
 # suppress spurious warnngs about 
 # "Extra checking for conflicts with always_comb done at vopt time"
 # because vsim will run vopt
-#vlog +incdir+$1 ../testbench/testbench-imperas.sv ../src/*/*.sv -suppress 2583 -work work$2
+vlog +incdir+$1 ../testbench/testbench-imperas.sv ../testbench/function_radix.sv ../src/*/*.sv -suppress 2583
 
 # start and run simulation
 # remove +acc flag for faster sim during regressions if there is no need to access internal signals
-#vopt +acc=+/testbench/dut/hart/ifu/bpred/DirPredictor/memory/memory +acc=+/testbench/dut/hart/ifu/bpred/TargetPredictor/memory/memory work$2.testbench -o workopt$2
-#vsim workopt$2
+vopt +acc=+/testbench/dut/hart/ifu/bpred/DirPredictor/memory/memory +acc=+/testbench/dut/hart/ifu/bpred/TargetPredictor/memory/memory work.testbench -o workopt 
+vsim workopt
 
-# load the branch predictors with known data. The value of the data is not important for function, but
-# is important for perventing pessimistic x propagation.
-#mem load -infile twoBitPredictor.txt -format bin testbench/dut/hart/ifu/bpred/DirPredictor/memory/memory
-#switch $argc {
-#    0 {mem load -infile ../config/rv64ic/BTBPredictor.txt -format bin testbench/dut/hart/ifu/bpred/TargetPredictor/memory/memory}
-#    1 {mem load -infile ../config/$1/BTBPredictor.txt -format bin testbench/dut/hart/ifu/bpred/TargetPredictor/memory/memory}
-#}
+mem load -infile twoBitPredictor.txt -format bin testbench/dut/hart/ifu/bpred/DirPredictor/memory/memory
+mem load -infile ../config/$1/BTBPredictor.txt -format bin testbench/dut/hart/ifu/bpred/TargetPredictor/memory/memory
 
-#run -all
-#quit
+run -all
+quit

From 4c8952de6a499928eeed9133d676a4c14a57215c Mon Sep 17 00:00:00 2001
From: Ross Thompson <stephen.thompson.37@us.af.mil>
Date: Mon, 15 Mar 2021 12:39:44 -0500
Subject: [PATCH 2/4] Converted branch predictor preloads to use system verilog
 rather than modelsim's load command.

---
 .../busybear}/twoBitPredictor.txt             |    0
 .../config/busybear/wally-config.vh           |    3 +
 .../config/coremark/twoBitPredictor.txt       | 1024 +++++++++++++++++
 .../config/coremark/wally-config.vh           |    3 +
 .../config/rv32ic/twoBitPredictor.txt         | 1024 +++++++++++++++++
 wally-pipelined/config/rv32ic/wally-config.vh |    3 +
 .../config/rv64ic/twoBitPredictor.txt         | 1024 +++++++++++++++++
 wally-pipelined/config/rv64ic/wally-config.vh |    3 +
 .../config/rv64icfd/twoBitPredictor.txt       | 1024 +++++++++++++++++
 .../config/rv64icfd/wally-config.vh           |    3 +
 .../regression/wally-busybear-batch.do        |    9 +-
 wally-pipelined/regression/wally-busybear.do  |    7 -
 wally-pipelined/regression/wally-coremark.do  |    8 -
 .../regression/wally-peripherals.do           |    7 -
 .../wally-pipelined-batch-parallel.do         |    5 +-
 .../regression/wally-pipelined-batch.do       |   10 +-
 .../regression/wally-pipelined-ross.do        |    7 -
 wally-pipelined/regression/wally-pipelined.do |    7 -
 .../testbench/testbench-imperas.sv            |    6 +
 19 files changed, 4120 insertions(+), 57 deletions(-)
 rename wally-pipelined/{regression => config/busybear}/twoBitPredictor.txt (100%)
 create mode 100644 wally-pipelined/config/coremark/twoBitPredictor.txt
 create mode 100644 wally-pipelined/config/rv32ic/twoBitPredictor.txt
 create mode 100644 wally-pipelined/config/rv64ic/twoBitPredictor.txt
 create mode 100644 wally-pipelined/config/rv64icfd/twoBitPredictor.txt

diff --git a/wally-pipelined/regression/twoBitPredictor.txt b/wally-pipelined/config/busybear/twoBitPredictor.txt
similarity index 100%
rename from wally-pipelined/regression/twoBitPredictor.txt
rename to wally-pipelined/config/busybear/twoBitPredictor.txt
diff --git a/wally-pipelined/config/busybear/wally-config.vh b/wally-pipelined/config/busybear/wally-config.vh
index b01a2e30..dc4d6451 100644
--- a/wally-pipelined/config/busybear/wally-config.vh
+++ b/wally-pipelined/config/busybear/wally-config.vh
@@ -86,3 +86,6 @@
 
 /* verilator lint_off STMTDLY */
 /* verilator lint_off WIDTH */
+
+`define TWO_BIT_PRELOAD "../config/busybear/twoBitPredictor.txt"
+`define BTB_PRELOAD "../config/busybear/BTBPredictor.txt"
diff --git a/wally-pipelined/config/coremark/twoBitPredictor.txt b/wally-pipelined/config/coremark/twoBitPredictor.txt
new file mode 100644
index 00000000..ff57bd47
--- /dev/null
+++ b/wally-pipelined/config/coremark/twoBitPredictor.txt
@@ -0,0 +1,1024 @@
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diff --git a/wally-pipelined/config/coremark/wally-config.vh b/wally-pipelined/config/coremark/wally-config.vh
index 906373f9..8a0fdfbc 100644
--- a/wally-pipelined/config/coremark/wally-config.vh
+++ b/wally-pipelined/config/coremark/wally-config.vh
@@ -88,3 +88,6 @@
 /* verilator lint_off WIDTH */
 /* verilator lint_off ASSIGNDLY */
 /* verilator lint_off PINCONNECTEMPTY */
+
+`define TWO_BIT_PRELOAD "../config/coremark/twoBitPredictor.txt"
+`define BTB_PRELOAD "../config/coremark/BTBPredictor.txt"
diff --git a/wally-pipelined/config/rv32ic/twoBitPredictor.txt b/wally-pipelined/config/rv32ic/twoBitPredictor.txt
new file mode 100644
index 00000000..ff57bd47
--- /dev/null
+++ b/wally-pipelined/config/rv32ic/twoBitPredictor.txt
@@ -0,0 +1,1024 @@
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diff --git a/wally-pipelined/config/rv32ic/wally-config.vh b/wally-pipelined/config/rv32ic/wally-config.vh
index a5d3ba30..df46e28d 100644
--- a/wally-pipelined/config/rv32ic/wally-config.vh
+++ b/wally-pipelined/config/rv32ic/wally-config.vh
@@ -84,3 +84,6 @@
 
 /* verilator lint_off STMTDLY */
 /* verilator lint_off WIDTH */
+
+`define TWO_BIT_PRELOAD "../config/rv32ic/twoBitPredictor.txt"
+`define BTB_PRELOAD "../config/rv32ic/BTBPredictor.txt"
diff --git a/wally-pipelined/config/rv64ic/twoBitPredictor.txt b/wally-pipelined/config/rv64ic/twoBitPredictor.txt
new file mode 100644
index 00000000..ff57bd47
--- /dev/null
+++ b/wally-pipelined/config/rv64ic/twoBitPredictor.txt
@@ -0,0 +1,1024 @@
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diff --git a/wally-pipelined/config/rv64ic/wally-config.vh b/wally-pipelined/config/rv64ic/wally-config.vh
index e5240e8b..e91f45cb 100644
--- a/wally-pipelined/config/rv64ic/wally-config.vh
+++ b/wally-pipelined/config/rv64ic/wally-config.vh
@@ -87,3 +87,6 @@
 /* verilator lint_off WIDTH */
 /* verilator lint_off ASSIGNDLY */
 /* verilator lint_off PINCONNECTEMPTY */
+
+`define TWO_BIT_PRELOAD "../config/rv64ic/twoBitPredictor.txt"
+`define BTB_PRELOAD "../config/rv64ic/BTBPredictor.txt"
diff --git a/wally-pipelined/config/rv64icfd/twoBitPredictor.txt b/wally-pipelined/config/rv64icfd/twoBitPredictor.txt
new file mode 100644
index 00000000..ff57bd47
--- /dev/null
+++ b/wally-pipelined/config/rv64icfd/twoBitPredictor.txt
@@ -0,0 +1,1024 @@
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diff --git a/wally-pipelined/config/rv64icfd/wally-config.vh b/wally-pipelined/config/rv64icfd/wally-config.vh
index 9e8dccc9..2e685e6e 100644
--- a/wally-pipelined/config/rv64icfd/wally-config.vh
+++ b/wally-pipelined/config/rv64icfd/wally-config.vh
@@ -87,3 +87,6 @@
 /* verilator lint_off WIDTH */
 /* verilator lint_off ASSIGNDLY */
 /* verilator lint_off PINCONNECTEMPTY */
+
+`define TWO_BIT_PRELOAD "../config/rv64icfd/twoBitPredictor.txt"
+`define BTB_PRELOAD "../config/rv64icfd/BTBPredictor.txt"
diff --git a/wally-pipelined/regression/wally-busybear-batch.do b/wally-pipelined/regression/wally-busybear-batch.do
index a9874973..036fed32 100644
--- a/wally-pipelined/regression/wally-busybear-batch.do
+++ b/wally-pipelined/regression/wally-busybear-batch.do
@@ -31,16 +31,9 @@ vlog +incdir+../config/busybear ../testbench/*.sv ../src/*/*.sv -suppress 2583
 
 # start and run simulation
 # remove +acc flag for faster sim during regressions if there is no need to access internal signals
-vopt +acc=+/testbench_busybear/dut/hart/ifu/bpred/DirPredictor/memory/memory +acc=+/testbench_busybear/dut/hart/ifu/bpred/TargetPredictor/memory/memory work.testbench_busybear -o workopt 
+vopt work.testbench_busybear -o workopt 
 
 vsim workopt -suppress 8852,12070
-# load the branch predictors with known data. The value of the data is not important for function, but
-# is important for perventing pessimistic x propagation.
-mem load -infile twoBitPredictor.txt -format bin testbench_busybear/dut/hart/ifu/bpred/DirPredictor/memory/memory
-switch $argc {
-    0 {mem load -infile ../config/rv64ic/BTBPredictor.txt -format bin testbench_busybear/dut/hart/ifu/bpred/TargetPredictor/memory/memory}
-    1 {mem load -infile ../config/$1/BTBPredictor.txt -format bin testbench_busybear/dut/hart/ifu/bpred/TargetPredictor/memory/memory}
-}
 
 run -all
 quit
diff --git a/wally-pipelined/regression/wally-busybear.do b/wally-pipelined/regression/wally-busybear.do
index 42d04cb7..e4b75a08 100644
--- a/wally-pipelined/regression/wally-busybear.do
+++ b/wally-pipelined/regression/wally-busybear.do
@@ -34,13 +34,6 @@ vlog +incdir+../config/busybear ../testbench/*.sv ../src/*/*.sv -suppress 2583
 vopt +acc work.testbench_busybear -o workopt 
 
 vsim workopt -suppress 8852,12070
-# load the branch predictors with known data. The value of the data is not important for function, but
-# is important for perventing pessimistic x propagation.
-mem load -infile twoBitPredictor.txt -format bin testbench_busybear/dut/hart/ifu/bpred/DirPredictor/memory/memory
-switch $argc {
-    0 {mem load -infile ../config/rv64ic/BTBPredictor.txt -format bin testbench_busybear/dut/hart/ifu/bpred/TargetPredictor/memory/memory}
-    1 {mem load -infile ../config/$1/BTBPredictor.txt -format bin testbench_busybear/dut/hart/ifu/bpred/TargetPredictor/memory/memory}
-}
 
 
 view wave
diff --git a/wally-pipelined/regression/wally-coremark.do b/wally-pipelined/regression/wally-coremark.do
index 5517fe11..056b34cb 100644
--- a/wally-pipelined/regression/wally-coremark.do
+++ b/wally-pipelined/regression/wally-coremark.do
@@ -35,14 +35,6 @@ vlog +incdir+../config/coremark ../testbench/testbench-coremark.sv ../src/*/*.sv
 vopt +acc work.testbench -o workopt 
 vsim workopt
 
-# load the branch predictors with known data. The value of the data is not important for function, but
-# is important for perventing pessimistic x propagation.
-mem load -infile twoBitPredictor.txt -format bin testbench/dut/hart/ifu/bpred/DirPredictor/memory/memory
-switch $argc {
-    0 {mem load -infile ../config/rv64ic/BTBPredictor.txt -format bin testbench/dut/hart/ifu/bpred/TargetPredictor/memory/memory}
-    1 {mem load -infile ../config/$1/BTBPredictor.txt -format bin testbench/dut/hart/ifu/bpred/TargetPredictor/memory/memory}
-}
-
 view wave
 
 -- display input and output signals as hexidecimal values
diff --git a/wally-pipelined/regression/wally-peripherals.do b/wally-pipelined/regression/wally-peripherals.do
index c8472c88..ea860b95 100644
--- a/wally-pipelined/regression/wally-peripherals.do
+++ b/wally-pipelined/regression/wally-peripherals.do
@@ -38,13 +38,6 @@ switch $argc {
 vopt +acc work.testbench -o workopt 
 vsim workopt
 
-# load the branch predictors with known data. The value of the data is not important for function, but
-# is important for perventing pessimistic x propagation.
-mem load -infile twoBitPredictor.txt -format bin testbench/dut/hart/ifu/bpred/DirPredictor/memory/memory
-switch $argc {
-    0 {mem load -infile ../config/rv64ic/BTBPredictor.txt -format bin testbench/dut/hart/ifu/bpred/TargetPredictor/memory/memory}
-    1 {mem load -infile ../config/$1/BTBPredictor.txt -format bin testbench/dut/hart/ifu/bpred/TargetPredictor/memory/memory}
-}
 
 view wave
 do wally-peripherals-signals.do
diff --git a/wally-pipelined/regression/wally-pipelined-batch-parallel.do b/wally-pipelined/regression/wally-pipelined-batch-parallel.do
index c4202edb..8b5fa5c5 100644
--- a/wally-pipelined/regression/wally-pipelined-batch-parallel.do
+++ b/wally-pipelined/regression/wally-pipelined-batch-parallel.do
@@ -31,11 +31,8 @@ vlog +incdir+$1 ../testbench/testbench-imperas.sv ../testbench/function_radix.sv
 
 # start and run simulation
 # remove +acc flag for faster sim during regressions if there is no need to access internal signals
-vopt +acc=+/testbench/dut/hart/ifu/bpred/DirPredictor/memory/memory +acc=+/testbench/dut/hart/ifu/bpred/TargetPredictor/memory/memory work.testbench -o workopt 
+vopt work.testbench -o workopt
 vsim workopt
 
-mem load -infile twoBitPredictor.txt -format bin testbench/dut/hart/ifu/bpred/DirPredictor/memory/memory
-mem load -infile ../config/$1/BTBPredictor.txt -format bin testbench/dut/hart/ifu/bpred/TargetPredictor/memory/memory
-
 run -all
 quit
diff --git a/wally-pipelined/regression/wally-pipelined-batch.do b/wally-pipelined/regression/wally-pipelined-batch.do
index 593e3018..040c03c5 100644
--- a/wally-pipelined/regression/wally-pipelined-batch.do
+++ b/wally-pipelined/regression/wally-pipelined-batch.do
@@ -35,16 +35,8 @@ switch $argc {
 }
 # start and run simulation
 # remove +acc flag for faster sim during regressions if there is no need to access internal signals
-vopt +acc=+/testbench/dut/hart/ifu/bpred/DirPredictor/memory/memory +acc=+/testbench/dut/hart/ifu/bpred/TargetPredictor/memory/memory work.testbench -o workopt 
+vopt work.testbench -o workopt 
 vsim workopt
 
-# load the branch predictors with known data. The value of the data is not important for function, but
-# is important for perventing pessimistic x propagation.
-mem load -infile twoBitPredictor.txt -format bin testbench/dut/hart/ifu/bpred/DirPredictor/memory/memory
-switch $argc {
-    0 {mem load -infile ../config/rv64ic/BTBPredictor.txt -format bin testbench/dut/hart/ifu/bpred/TargetPredictor/memory/memory}
-    1 {mem load -infile ../config/$1/BTBPredictor.txt -format bin testbench/dut/hart/ifu/bpred/TargetPredictor/memory/memory}
-}
-
 run -all
 quit
diff --git a/wally-pipelined/regression/wally-pipelined-ross.do b/wally-pipelined/regression/wally-pipelined-ross.do
index d1fc7eea..9ea5c2eb 100644
--- a/wally-pipelined/regression/wally-pipelined-ross.do
+++ b/wally-pipelined/regression/wally-pipelined-ross.do
@@ -38,13 +38,6 @@ switch $argc {
 vopt +acc -gDEBUG=1 work.testbench -o workopt 
 vsim workopt
 
-# load the branch predictors with known data. The value of the data is not important for function, but
-# is important for perventing pessimistic x propagation.
-mem load -infile twoBitPredictor.txt -format bin testbench/dut/hart/ifu/bpred/DirPredictor/memory/memory
-switch $argc {
-    0 {mem load -infile ../config/rv64ic/BTBPredictor.txt -format bin testbench/dut/hart/ifu/bpred/TargetPredictor/memory/memory}
-    1 {mem load -infile ../config/$1/BTBPredictor.txt -format bin testbench/dut/hart/ifu/bpred/TargetPredictor/memory/memory}
-}
 
 do wave.do
 add log -r /*
diff --git a/wally-pipelined/regression/wally-pipelined.do b/wally-pipelined/regression/wally-pipelined.do
index 49e349ed..5f3b0d71 100644
--- a/wally-pipelined/regression/wally-pipelined.do
+++ b/wally-pipelined/regression/wally-pipelined.do
@@ -38,13 +38,6 @@ switch $argc {
 vopt +acc work.testbench -o workopt 
 vsim workopt
 
-# load the branch predictors with known data. The value of the data is not important for function, but
-# is important for perventing pessimistic x propagation.
-mem load -infile twoBitPredictor.txt -format bin testbench/dut/hart/ifu/bpred/DirPredictor/memory/memory
-switch $argc {
-    0 {mem load -infile ../config/rv64ic/BTBPredictor.txt -format bin testbench/dut/hart/ifu/bpred/TargetPredictor/memory/memory}
-    1 {mem load -infile ../config/$1/BTBPredictor.txt -format bin testbench/dut/hart/ifu/bpred/TargetPredictor/memory/memory}
-}
 
 view wave
 
diff --git a/wally-pipelined/testbench/testbench-imperas.sv b/wally-pipelined/testbench/testbench-imperas.sv
index e55fa1b7..3c9c4cc9 100644
--- a/wally-pipelined/testbench/testbench-imperas.sv
+++ b/wally-pipelined/testbench/testbench-imperas.sv
@@ -471,6 +471,12 @@ string tests32i[] = {
 				  .ProgramAddrMapFile(ProgramAddrMapFile),
 				  .ProgramLabelMapFile(ProgramLabelMapFile));
   end
+
+  // initialize the branch predictor
+  initial begin
+    $readmemb(`TWO_BIT_PRELOAD, dut.hart.ifu.bpred.DirPredictor.memory.memory);
+    $readmemb(`BTB_PRELOAD, dut.hart.ifu.bpred.TargetPredictor.memory.memory);    
+  end
   
 endmodule
 

From 400791163effa79a06a7b46bf67c623b26289078 Mon Sep 17 00:00:00 2001
From: Noah Boorstin <nboorstin@hmc.edu>
Date: Mon, 15 Mar 2021 18:27:27 -0400
Subject: [PATCH 3/4] copy Ross's branch predictor preload change into busybear

---
 wally-pipelined/testbench/testbench-busybear.sv | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/wally-pipelined/testbench/testbench-busybear.sv b/wally-pipelined/testbench/testbench-busybear.sv
index ababf7e4..abd830b8 100644
--- a/wally-pipelined/testbench/testbench-busybear.sv
+++ b/wally-pipelined/testbench/testbench-busybear.sv
@@ -101,6 +101,8 @@ module testbench_busybear();
     $readmemh("/courses/e190ax/busybear_boot/ram.txt", dut.uncore.dtim.RAM);
     $readmemh("/courses/e190ax/busybear_boot/bootmem.txt", dut.imem.bootram, 'h1000 >> 3);
     $readmemh("/courses/e190ax/busybear_boot/ram.txt", dut.imem.RAM);
+    $readmemb(`TWO_BIT_PRELOAD, dut.hart.ifu.bpred.DirPredictor.memory.memory);
+    $readmemb(`BTB_PRELOAD, dut.hart.ifu.bpred.TargetPredictor.memory.memory);
   end
 
   integer warningCount = 0;

From 9e1612c1662f9b0d1eabb0ca71fa619546d9e579 Mon Sep 17 00:00:00 2001
From: Noah Boorstin <nboorstin@hmc.edu>
Date: Mon, 15 Mar 2021 19:03:57 -0400
Subject: [PATCH 4/4] remove regression-wally.sh

---
 .../regression/regression-wally.sh            | 34 -------------------
 1 file changed, 34 deletions(-)
 delete mode 100755 wally-pipelined/regression/regression-wally.sh

diff --git a/wally-pipelined/regression/regression-wally.sh b/wally-pipelined/regression/regression-wally.sh
deleted file mode 100755
index 39d82102..00000000
--- a/wally-pipelined/regression/regression-wally.sh
+++ /dev/null
@@ -1,34 +0,0 @@
-#!/usr/bin/env bash
-check_test () {
-  output=$(timeout 2m ./"$1" 2>/dev/null)
-  found=$(echo $output | grep -c "$2")
-  echo "$found"
-}
-echo "-----------------------"
-echo "starting all regression tests!"
-echo "note: this could take up to 3 minutes to run"
-echo "-----------------------"
-echo "checking verilator"
-verilator_out=$(cd ..; ./lint-wally 2>&1)
-[[ -z $verilator_out ]] && echo "verilator passed" || echo "verilator failed"
-echo "starting Imperas rv64ic"
-sleep 1
-exec 3< <(check_test "sim-wally-batch" "All tests ran without failures.")
-#echo "starting Imperas rv32ic"
-#sleep 1
-#exec 5< <(check_test "sim-wally-rv32ic" "All tests ran without failures.")
-#echo "starting busybear"
-sleep 1
-exec 4< <(check_test "sim-busybear-batch" "loaded 100000 instructions")
-echo "-----------------------"
-echo "waiting for tests to finish..."
-echo "-----------------------"
-rv64_out=$(cat <&3)
-[[ $rv64_out -eq 1 ]] && echo "rv64ic passed" || echo "rv64ic failed"
-#rv32_out=$(cat <&5)
-#[[ $rv32_out -eq 1 ]] && echo "rv32ic passed" || echo "rv32ic failed"
-busybear_out=$(cat <&4)
-[[ $busybear_out -eq 1 ]] && echo "busybear passed" || echo "busybear failed"
-
-[[ -z $verilator_out && $rv64_out -eq 1 && $busybear_out -eq 1 ]] && echo "all passed" || echo "not all passed"
-#[[ -z $verilator_out && $rv32_out -eq 1 && $rv64_out -eq 1 && $busybear_out -eq 1 ]] && echo "all passed" || echo "not all passed"