forked from Github_Repos/cvw
Update to missing vectors :P and also run_all script. Also made all scripts .sh as technically run using SH
This commit is contained in:
James E. Stine
parent
13352eccda
commit
2b66615812
@ -29,87 +29,146 @@ However, they can easily be created with the create scripts.
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James Stine
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10/7/2021
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List of TestVectors (TV) and sizes
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File Sizes
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600 1800 17400 f32_f64_rd.tv
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600 1800 17400 f32_f64_rne.tv
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600 1800 17400 f32_f64_ru.tv
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600 1800 17400 f32_f64_rz.tv
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600 1800 17400 f32_i64_rd.tv
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600 1800 17400 f32_i64_rne.tv
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600 1800 17400 f32_i64_ru.tv
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600 1800 17400 f32_i64_rz.tv
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600 1800 17400 f32_ui64_rd.tv
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600 1800 17400 f32_ui64_rne.tv
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600 1800 17400 f32_ui64_ru.tv
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600 1800 17400 f32_ui64_rz.tv
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46464 185856 2509056 f64_add_rd.tv
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46464 185856 2509056 f64_add_rne.tv
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46464 185856 2509056 f64_add_ru.tv
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46464 185856 2509056 f64_add_rz.tv
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46464 185856 2509056 f64_div_rd.tv
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46464 185856 2509056 f64_div_rne.tv
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46464 185856 2509056 f64_div_ru.tv
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46464 185856 2509056 f64_div_rz.tv
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768 2304 22272 f64_f32_rd.tv
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768 2304 22272 f64_f32_rne.tv
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768 2304 22272 f64_f32_ru.tv
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768 2304 22272 f64_f32_rz.tv
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6133248 30666240 435460608 f64_fma_rd.tv
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6133248 30666240 435460608 f64_fma_rne.tv
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6133248 30666240 435460608 f64_fma_ru.tv
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6133248 30666240 435460608 f64_fma_rz.tv
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768 2304 22272 f64_i32_rd.tv
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768 2304 22272 f64_i32_rne.tv
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768 2304 22272 f64_i32_ru.tv
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768 2304 22272 f64_i32_rz.tv
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46464 185856 2509056 f64_mul_rd.tv
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46464 185856 2509056 f64_mul_rne.tv
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46464 185856 2509056 f64_mul_ru.tv
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46464 185856 2509056 f64_mul_rz.tv
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768 2304 28416 f64_sqrt_rd.tv
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768 2304 28416 f64_sqrt_rne.tv
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768 2304 28416 f64_sqrt_ru.tv
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768 2304 28416 f64_sqrt_rz.tv
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46464 185856 2509056 f64_sub_rd.tv
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46464 185856 2509056 f64_sub_rne.tv
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46464 185856 2509056 f64_sub_ru.tv
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46464 185856 2509056 f64_sub_rz.tv
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768 2304 22272 f64_ui32_rd.tv
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768 2304 22272 f64_ui32_rne.tv
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768 2304 22272 f64_ui32_ru.tv
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768 2304 22272 f64_ui32_rz.tv
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372 1116 7812 i32_f32_rd.tv
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372 1116 7812 i32_f32_rne.tv
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372 1116 7812 i32_f32_ru.tv
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372 1116 7812 i32_f32_rz.tv
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372 1116 10788 i32_f64_rd.tv
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372 1116 10788 i32_f64_rne.tv
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372 1116 10788 i32_f64_ru.tv
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372 1116 10788 i32_f64_rz.tv
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756 2268 21924 i64_f32_rd.tv
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756 2268 21924 i64_f32_rne.tv
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756 2268 21924 i64_f32_ru.tv
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756 2268 21924 i64_f32_rz.tv
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756 2268 27972 i64_f64_rd.tv
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756 2268 27972 i64_f64_rne.tv
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756 2268 27972 i64_f64_ru.tv
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756 2268 27972 i64_f64_rz.tv
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372 1116 7812 ui32_f32_rd.tv
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372 1116 7812 ui32_f32_rne.tv
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372 1116 7812 ui32_f32_ru.tv
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372 1116 7812 ui32_f32_rz.tv
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372 1116 10788 ui32_f64_rd.tv
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372 1116 10788 ui32_f64_rne.tv
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372 1116 10788 ui32_f64_ru.tv
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372 1116 10788 ui32_f64_rz.tv
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756 2268 21924 ui64_f32_rd.tv
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756 2268 21924 ui64_f32_rne.tv
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756 2268 21924 ui64_f32_ru.tv
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756 2268 21924 ui64_f32_rz.tv
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756 2268 27972 ui64_f64_rd.tv
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756 2268 27972 ui64_f64_rne.tv
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756 2268 27972 ui64_f64_ru.tv
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756 2268 27972 ui64_f64_rz.tv
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25313952 125751264 1783125024 total
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46464 185856 836352 f16_add_rd.tv
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46464 185856 836352 f16_add_rne.tv
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46464 185856 836352 f16_add_ru.tv
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46464 185856 836352 f16_add_rz.tv
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46464 185856 836352 f16_div_rd.tv
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46464 185856 836352 f16_div_rne.tv
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46464 185856 836352 f16_div_ru.tv
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46464 185856 836352 f16_div_rz.tv
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408 1224 5304 f16_sqrt_rd.tv
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408 1224 5304 f16_sqrt_rne.tv
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408 1224 5304 f16_sqrt_ru.tv
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408 1224 5304 f16_sqrt_rz.tv
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46464 185856 836352 f16_sub_rd.tv
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46464 185856 836352 f16_sub_rne.tv
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46464 185856 836352 f16_sub_ru.tv
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46464 185856 836352 f16_sub_rz.tv
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46464 185856 1393920 f32_add_rd.tv
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46464 185856 1393920 f32_add_rne.tv
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46464 185856 1393920 f32_add_ru.tv
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46464 185856 1393920 f32_add_rz.tv
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46464 185856 1068672 f32_cmp_eq_signaling.tv
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46464 185856 1068672 f32_cmp_eq.tv
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46464 185856 1068672 f32_cmp_le_quiet.tv
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46464 185856 1068672 f32_cmp_le.tv
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46464 185856 1068672 f32_cmp_lt_quiet.tv
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46464 185856 1068672 f32_cmp_lt.tv
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46464 185856 1393920 f32_div_rd.tv
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46464 185856 1393920 f32_div_rne.tv
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46464 185856 1393920 f32_div_ru.tv
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46464 185856 1393920 f32_div_rz.tv
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600 1800 17400 f32_f64_rd.tv
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600 1800 17400 f32_f64_rne.tv
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600 1800 17400 f32_f64_ru.tv
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600 1800 17400 f32_f64_rz.tv
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600 1800 12600 f32_i32_rd.tv
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600 1800 12600 f32_i32_rne.tv
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600 1800 12600 f32_i32_ru.tv
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600 1800 12600 f32_i32_rz.tv
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600 1800 17400 f32_i64_rd.tv
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600 1800 17400 f32_i64_rne.tv
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600 1800 17400 f32_i64_ru.tv
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600 1800 17400 f32_i64_rz.tv
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46464 46464 1393920 f32_mul_rd.tv
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46464 46464 1393920 f32_mul_rne.tv
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46464 46464 1393920 f32_mul_ru.tv
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46464 46464 1393920 f32_mul_rz.tv
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600 1800 12600 f32_sqrt_rd.tv
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600 1800 12600 f32_sqrt_rne.tv
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600 1800 12600 f32_sqrt_ru.tv
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600 1800 12600 f32_sqrt_rz.tv
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46464 185856 1393920 f32_sub_rd.tv
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46464 185856 1393920 f32_sub_rne.tv
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46464 185856 1393920 f32_sub_ru.tv
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46464 185856 1393920 f32_sub_rz.tv
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600 1800 12600 f32_ui32_rd.tv
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600 1800 12600 f32_ui32_rne.tv
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600 1800 12600 f32_ui32_ru.tv
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600 1800 12600 f32_ui32_rz.tv
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600 1800 17400 f32_ui64_rd.tv
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600 1800 17400 f32_ui64_rne.tv
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600 1800 17400 f32_ui64_ru.tv
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600 1800 17400 f32_ui64_rz.tv
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46464 185856 2509056 f64_add_rd.tv
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46464 185856 2509056 f64_add_rne.tv
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46464 185856 2509056 f64_add_ru.tv
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46464 185856 2509056 f64_add_rz.tv
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46464 185856 1812096 f64_cmp_eq_signaling.tv
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46464 185856 1812096 f64_cmp_eq.tv
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46464 185856 1812096 f64_cmp_le_quiet.tv
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46464 185856 1812096 f64_cmp_le.tv
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46464 185856 1812096 f64_cmp_lt_quiet.tv
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46464 185856 1812096 f64_cmp_lt.tv
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46464 185856 2509056 f64_div_rd.tv
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46464 185856 2509056 f64_div_rne.tv
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46464 185856 2509056 f64_div_ru.tv
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46464 185856 2509056 f64_div_rz.tv
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768 2304 22272 f64_f32_rd.tv
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768 2304 22272 f64_f32_rne.tv
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768 2304 22272 f64_f32_ru.tv
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768 2304 22272 f64_f32_rz.tv
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768 2304 22272 f64_i32_rd.tv
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768 2304 22272 f64_i32_rne.tv
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768 2304 22272 f64_i32_ru.tv
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768 2304 22272 f64_i32_rz.tv
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768 2304 28416 f64_i64_rd.tv
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768 2304 28416 f64_i64_rne.tv
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768 2304 28416 f64_i64_ru.tv
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768 2304 28416 f64_i64_rz.tv
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46464 185856 2509056 f64_mul_rd.tv
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46464 185856 2509056 f64_mul_rne.tv
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46464 185856 2509056 f64_mul_ru.tv
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46464 185856 2509056 f64_mul_rz.tv
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768 2304 28416 f64_sqrt_rd.tv
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768 2304 28416 f64_sqrt_rne.tv
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768 2304 28416 f64_sqrt_ru.tv
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768 2304 28416 f64_sqrt_rz.tv
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46464 185856 2509056 f64_sub_rd.tv
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46464 185856 2509056 f64_sub_rne.tv
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46464 185856 2509056 f64_sub_ru.tv
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46464 185856 2509056 f64_sub_rz.tv
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768 2304 22272 f64_ui32_rd.tv
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768 2304 22272 f64_ui32_rne.tv
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768 2304 22272 f64_ui32_ru.tv
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768 2304 22272 f64_ui32_rz.tv
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768 2304 28416 f64_ui64_rd.tv
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768 2304 28416 f64_ui64_rne.tv
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768 2304 28416 f64_ui64_ru.tv
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768 2304 28416 f64_ui64_rz.tv
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372 1116 7812 i32_f32_rd.tv
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372 1116 7812 i32_f32_rne.tv
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372 1116 7812 i32_f32_ru.tv
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372 1116 7812 i32_f32_rz.tv
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372 1116 10788 i32_f64_rd.tv
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372 1116 10788 i32_f64_rne.tv
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372 1116 10788 i32_f64_ru.tv
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372 1116 10788 i32_f64_rz.tv
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756 2268 21924 i64_f32_rd.tv
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756 2268 21924 i64_f32_rne.tv
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756 2268 21924 i64_f32_ru.tv
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756 2268 21924 i64_f32_rz.tv
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756 2268 27972 i64_f64_rd.tv
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756 2268 27972 i64_f64_rne.tv
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756 2268 27972 i64_f64_ru.tv
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756 2268 27972 i64_f64_rz.tv
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372 1116 7812 ui32_f32_rd.tv
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372 1116 7812 ui32_f32_rne.tv
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372 1116 7812 ui32_f32_ru.tv
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372 1116 7812 ui32_f32_rz.tv
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372 1116 10788 ui32_f64_rd.tv
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372 1116 10788 ui32_f64_rne.tv
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372 1116 10788 ui32_f64_ru.tv
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372 1116 10788 ui32_f64_rz.tv
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756 2268 21924 ui64_f32_rd.tv
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756 2268 21924 ui64_f32_rne.tv
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756 2268 21924 ui64_f32_ru.tv
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756 2268 21924 ui64_f32_rz.tv
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756 2268 27972 ui64_f64_rd.tv
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756 2268 27972 ui64_f64_rne.tv
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756 2268 27972 ui64_f64_ru.tv
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756 2268 27972 ui64_f64_rz.tv
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2654496 10007904 91305888 total
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22
wally-pipelined/testbench/fp/create_vectors16.sh
Executable file
22
wally-pipelined/testbench/fp/create_vectors16.sh
Executable file
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#!/bin/sh
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./testfloat_gen -rnear_even f16_add > f16_add_rne.tv
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./testfloat_gen -rminMag f16_add > f16_add_rz.tv
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./testfloat_gen -rmin f16_add > f16_add_ru.tv
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./testfloat_gen -rmax f16_add > f16_add_rd.tv
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./testfloat_gen -rnear_even f16_sub > f16_sub_rne.tv
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./testfloat_gen -rminMag f16_sub > f16_sub_rz.tv
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./testfloat_gen -rmin f16_sub > f16_sub_ru.tv
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./testfloat_gen -rmax f16_sub > f16_sub_rd.tv
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./testfloat_gen -rnear_even f16_div > f16_div_rne.tv
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./testfloat_gen -rminMag f16_div > f16_div_rz.tv
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./testfloat_gen -rmin f16_div > f16_div_ru.tv
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./testfloat_gen -rmax f16_div > f16_div_rd.tv
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./testfloat_gen -rnear_even f16_sqrt > f16_sqrt_rne.tv
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./testfloat_gen -rminMag f16_sqrt > f16_sqrt_rz.tv
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./testfloat_gen -rmin f16_sqrt > f16_sqrt_ru.tv
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./testfloat_gen -rmax f16_sqrt > f16_sqrt_rd.tv
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20
wally-pipelined/testbench/fp/create_vectors32.sh
Executable file
20
wally-pipelined/testbench/fp/create_vectors32.sh
Executable file
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#!/bin/sh
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./testfloat_gen -rnear_even f32_add > f32_add_rne.tv
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./testfloat_gen -rminMag f32_add > f32_add_rz.tv
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./testfloat_gen -rmax f32_add > f32_add_ru.tv
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./testfloat_gen -rmin f32_add > f32_add_rd.tv
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./testfloat_gen -rnear_even f32_sub > f32_sub_rne.tv
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./testfloat_gen -rminMag f32_sub > f32_sub_rz.tv
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./testfloat_gen -rmax f32_sub > f32_sub_ru.tv
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./testfloat_gen -rmin f32_sub > f32_sub_rd.tv
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./testfloat_gen -rnear_even f32_div > f32_div_rne.tv
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./testfloat_gen -rminMag f32_div > f32_div_rz.tv
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./testfloat_gen -rmax f32_div > f32_div_ru.tv
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./testfloat_gen -rmin f32_div > f32_div_rd.tv
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./testfloat_gen -rnear_even f32_sqrt > f32_sqrt_rne.tv
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./testfloat_gen -rminMag f32_sqrt > f32_sqrt_rz.tv
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./testfloat_gen -rmax f32_sqrt > f32_sqrt_ru.tv
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./testfloat_gen -rmin f32_sqrt > f32_sqrt_rd.tv
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16
wally-pipelined/testbench/fp/create_vectors32_64.sh
Executable file
16
wally-pipelined/testbench/fp/create_vectors32_64.sh
Executable file
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#!/bin/sh
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./testfloat_gen -rnear_even f32_to_f64 > f32_f64_rne.tv
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./testfloat_gen -rminMag f32_to_f64 > f32_f64_rz.tv
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./testfloat_gen -rmax f32_to_f64 > f32_f64_ru.tv
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./testfloat_gen -rmin f32_to_f64 > f32_f64_rd.tv
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./testfloat_gen -rnear_even f32_to_i64 > f32_i64_rne.tv
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./testfloat_gen -rminMag f32_to_i64 > f32_i64_rz.tv
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./testfloat_gen -rmax f32_to_i64 > f32_i64_ru.tv
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./testfloat_gen -rmin f32_to_i64 > f32_i64_rd.tv
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./testfloat_gen -rnear_even f32_to_ui64 > f32_ui64_rne.tv
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./testfloat_gen -rminMag f32_to_ui64 > f32_ui64_rz.tv
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./testfloat_gen -rmax f32_to_ui64 > f32_ui64_ru.tv
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./testfloat_gen -rmin f32_to_ui64 > f32_ui64_rd.tv
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9
wally-pipelined/testbench/fp/create_vectors32cmp.sh
Executable file
9
wally-pipelined/testbench/fp/create_vectors32cmp.sh
Executable file
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#!/bin/sh
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./testfloat_gen f32_eq > f32_cmp_eq.tv
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./testfloat_gen f32_le > f32_cmp_le.tv
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./testfloat_gen f32_lt > f32_cmp_lt.tv
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./testfloat_gen f32_eq_signaling > f32_cmp_eq_signaling.tv
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./testfloat_gen f32_le_quiet > f32_cmp_le_quiet.tv
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./testfloat_gen f32_lt_quiet > f32_cmp_lt_quiet.tv
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20
wally-pipelined/testbench/fp/create_vectors64.sh
Executable file
20
wally-pipelined/testbench/fp/create_vectors64.sh
Executable file
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#!/bin/sh
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./testfloat_gen -rnear_even f64_add > f64_add_rne.tv
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./testfloat_gen -rminMag f64_add > f64_add_rz.tv
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./testfloat_gen -rmax f64_add > f64_add_ru.tv
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./testfloat_gen -rmin f64_add > f64_add_rd.tv
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./testfloat_gen -rnear_even f64_sub > f64_sub_rne.tv
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./testfloat_gen -rminMag f64_sub > f64_sub_rz.tv
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./testfloat_gen -rmax f64_sub > f64_sub_ru.tv
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./testfloat_gen -rmin f64_sub > f64_sub_rd.tv
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./testfloat_gen -rnear_even f64_div > f64_div_rne.tv
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./testfloat_gen -rminMag f64_div > f64_div_rz.tv
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./testfloat_gen -rmax f64_div > f64_div_ru.tv
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./testfloat_gen -rmin f64_div > f64_div_rd.tv
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./testfloat_gen -rnear_even f64_sqrt > f64_sqrt_rne.tv
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./testfloat_gen -rminMag f64_sqrt > f64_sqrt_rz.tv
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./testfloat_gen -rmax f64_sqrt > f64_sqrt_ru.tv
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./testfloat_gen -rmin f64_sqrt > f64_sqrt_rd.tv
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18
wally-pipelined/testbench/fp/create_vectors64_32.sh
Executable file
18
wally-pipelined/testbench/fp/create_vectors64_32.sh
Executable file
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#!/bin/sh
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./testfloat_gen -rnear_even f64_to_f32 > f64_f32_rne.tv
|
||||
./testfloat_gen -rminMag f64_to_f32 > f64_f32_rz.tv
|
||||
./testfloat_gen -rmax f64_to_f32 > f64_f32_ru.tv
|
||||
./testfloat_gen -rmin f64_to_f32 > f64_f32_rd.tv
|
||||
|
||||
./testfloat_gen -rnear_even f64_to_i32 > f64_i32_rne.tv
|
||||
./testfloat_gen -rminMag f64_to_i32 > f64_i32_rz.tv
|
||||
./testfloat_gen -rmax f64_to_i32 > f64_i32_ru.tv
|
||||
./testfloat_gen -rmin f64_to_i32 > f64_i32_rd.tv
|
||||
|
||||
./testfloat_gen -rnear_even f64_to_ui32 > f64_ui32_rne.tv
|
||||
./testfloat_gen -rminMag f64_to_ui32 > f64_ui32_rz.tv
|
||||
./testfloat_gen -rmax f64_to_ui32 > f64_ui32_ru.tv
|
||||
./testfloat_gen -rmin f64_to_ui32 > f64_ui32_rd.tv
|
||||
|
||||
|
||||
|
||||
9
wally-pipelined/testbench/fp/create_vectors64cmp.sh
Executable file
9
wally-pipelined/testbench/fp/create_vectors64cmp.sh
Executable file
@ -0,0 +1,9 @@
|
||||
#!/bin/sh
|
||||
./testfloat_gen f64_eq > f64_cmp_eq.tv
|
||||
./testfloat_gen f64_le > f64_cmp_le.tv
|
||||
./testfloat_gen f64_lt > f64_cmp_lt.tv
|
||||
|
||||
./testfloat_gen f64_eq_signaling > f64_cmp_eq_signaling.tv
|
||||
./testfloat_gen f64_le_quiet > f64_cmp_le_quiet.tv
|
||||
./testfloat_gen f64_lt_quiet > f64_cmp_lt_quiet.tv
|
||||
|
||||
60
wally-pipelined/testbench/fp/create_vectorsi.sh
Executable file
60
wally-pipelined/testbench/fp/create_vectorsi.sh
Executable file
@ -0,0 +1,60 @@
|
||||
#!/bin/sh
|
||||
./testfloat_gen -rnear_even -i32_to_f64 > i32_f64_rne.tv
|
||||
./testfloat_gen -rminMag -i32_to_f64 > i32_f64_rz.tv
|
||||
./testfloat_gen -rmax -i32_to_f64 > i32_f64_ru.tv
|
||||
./testfloat_gen -rmin -i32_to_f64 > i32_f64_rd.tv
|
||||
|
||||
./testfloat_gen -rnear_even -i64_to_f64 > i64_f64_rne.tv
|
||||
./testfloat_gen -rminMag -i64_to_f64 > i64_f64_rz.tv
|
||||
./testfloat_gen -rmax -i64_to_f64 > i64_f64_ru.tv
|
||||
./testfloat_gen -rmin -i64_to_f64 > i64_f64_rd.tv
|
||||
|
||||
./testfloat_gen -rnear_even -i32_to_f32 > i32_f32_rne.tv
|
||||
./testfloat_gen -rminMag -i32_to_f32 > i32_f32_rz.tv
|
||||
./testfloat_gen -rmax -i32_to_f32 > i32_f32_ru.tv
|
||||
./testfloat_gen -rmin -i32_to_f32 > i32_f32_rd.tv
|
||||
|
||||
./testfloat_gen -rnear_even -f32_to_i32 > f32_i32_rne.tv
|
||||
./testfloat_gen -rminMag -f32_to_i32 > f32_i32_rz.tv
|
||||
./testfloat_gen -rmax -f32_to_i32 > f32_i32_ru.tv
|
||||
./testfloat_gen -rmin -f32_to_i32 > f32_i32_rd.tv
|
||||
|
||||
./testfloat_gen -rnear_even -f32_to_ui32 > f32_ui32_rne.tv
|
||||
./testfloat_gen -rminMag -f32_to_ui32 > f32_ui32_rz.tv
|
||||
./testfloat_gen -rmax -f32_to_ui32 > f32_ui32_ru.tv
|
||||
./testfloat_gen -rmin -f32_to_ui32 > f32_ui32_rd.tv
|
||||
|
||||
./testfloat_gen -rnear_even -i64_to_f32 > i64_f32_rne.tv
|
||||
./testfloat_gen -rminMag -i64_to_f32 > i64_f32_rz.tv
|
||||
./testfloat_gen -rmax -i64_to_f32 > i64_f32_ru.tv
|
||||
./testfloat_gen -rmin -i64_to_f32 > i64_f32_rd.tv
|
||||
|
||||
./testfloat_gen -rnear_even -ui32_to_f64 > ui32_f64_rne.tv
|
||||
./testfloat_gen -rminMag -ui32_to_f64 > ui32_f64_rz.tv
|
||||
./testfloat_gen -rmax -ui32_to_f64 > ui32_f64_ru.tv
|
||||
./testfloat_gen -rmin -ui32_to_f64 > ui32_f64_rd.tv
|
||||
|
||||
./testfloat_gen -rnear_even -ui64_to_f64 > ui64_f64_rne.tv
|
||||
./testfloat_gen -rminMag -ui64_to_f64 > ui64_f64_rz.tv
|
||||
./testfloat_gen -rmax -ui64_to_f64 > ui64_f64_ru.tv
|
||||
./testfloat_gen -rmin -ui64_to_f64 > ui64_f64_rd.tv
|
||||
|
||||
./testfloat_gen -rnear_even -ui32_to_f32 > ui32_f32_rne.tv
|
||||
./testfloat_gen -rminMag -ui32_to_f32 > ui32_f32_rz.tv
|
||||
./testfloat_gen -rmax -ui32_to_f32 > ui32_f32_ru.tv
|
||||
./testfloat_gen -rmin -ui32_to_f32 > ui32_f32_rd.tv
|
||||
|
||||
./testfloat_gen -rnear_even -ui64_to_f32 > ui64_f32_rne.tv
|
||||
./testfloat_gen -rminMag -ui64_to_f32 > ui64_f32_rz.tv
|
||||
./testfloat_gen -rmax -ui64_to_f32 > ui64_f32_ru.tv
|
||||
./testfloat_gen -rmin -ui64_to_f32 > ui64_f32_rd.tv
|
||||
|
||||
./testfloat_gen -rnear_even -f64_to_i64 > f64_i64_rne.tv
|
||||
./testfloat_gen -rminMag -f64_to_i64 > f64_i64_rz.tv
|
||||
./testfloat_gen -rmax -f64_to_i64 > f64_i64_ru.tv
|
||||
./testfloat_gen -rmin -f64_to_i64 > f64_i64_rd.tv
|
||||
|
||||
./testfloat_gen -rnear_even -f64_to_ui64 > f64_ui64_rne.tv
|
||||
./testfloat_gen -rminMag -f64_to_ui64 > f64_ui64_rz.tv
|
||||
./testfloat_gen -rmax -f64_to_ui64 > f64_ui64_ru.tv
|
||||
./testfloat_gen -rmin -f64_to_ui64 > f64_ui64_rd.tv
|
||||
9
wally-pipelined/testbench/fp/run_all.sh
Executable file
9
wally-pipelined/testbench/fp/run_all.sh
Executable file
@ -0,0 +1,9 @@
|
||||
#!/bin/sh
|
||||
./create_vectors16.sh
|
||||
./create_vectors32_64.sh
|
||||
./create_vectors32cmp.sh
|
||||
./create_vectors32.sh
|
||||
./create_vectors64_32.sh
|
||||
./create_vectors64cmp.sh
|
||||
./create_vectors64.sh
|
||||
./create_vectorsi.sh
|
||||
Loading…
Reference in New Issue
Block a user