forked from Github_Repos/cvw
linux testbench now ignores HWRITE glitches caused by flush glitches
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5b47da21ba
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@ -4,6 +4,7 @@ view wave
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add wave -divider
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add wave -divider
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add wave /testbench/clk
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add wave /testbench/clk
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add wave /testbench/reset
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add wave /testbench/reset
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add wave -dec /testbench/instrs
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add wave -divider Stalls_and_Flushes
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add wave -divider Stalls_and_Flushes
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add wave /testbench/dut/hart/StallF
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add wave /testbench/dut/hart/StallF
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@ -27,7 +27,7 @@
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module testbench();
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module testbench();
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parameter waveOnICount = 2514000; // # of instructions at which to turn on waves in graphical sim
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parameter waveOnICount = 2657000; // # of instructions at which to turn on waves in graphical sim
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///////////////////////////////////////////////////////////////////////////////
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///////////////////////////////////////////////////////////////////////////////
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@ -491,7 +491,7 @@ module testbench();
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//always @(HWDATA or HADDR or HSIZE or HWRITE) begin
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//always @(HWDATA or HADDR or HSIZE or HWRITE) begin
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always @(negedge HWRITE) begin
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always @(negedge HWRITE) begin
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//#1;
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//#1;
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if ($time != 0) begin
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if (($time != 0) && ~dut.hart.hzu.FlushM) begin
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if($feof(data_file_memW)) begin
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if($feof(data_file_memW)) begin
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$display("no more memW data to read");
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$display("no more memW data to read");
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`ERROR
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`ERROR
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