forked from Github_Repos/cvw
Do File cleanups
This commit is contained in:
David Harris
parent
d9f569afe1
commit
0f319b45c1
10
examples/asm/ch5/Makefile
Normal file
10
examples/asm/ch5/Makefile
Normal file
@ -0,0 +1,10 @@
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ch5.debug: ch5
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riscv64-unknown-elf-objdump -D ch5 > ch5.debug
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ch5: ch5.S Makefile
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riscv64-unknown-elf-gcc -nodefaultlibs -nostartfiles -o ch5 ch5.S
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# -ffreestanding
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# -nostdlib
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clean:
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rm -f ch5 ch5.debug
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BIN
examples/asm/ch5/ch5
Executable file
BIN
examples/asm/ch5/ch5
Executable file
Binary file not shown.
16
examples/asm/ch5/ch5.S
Normal file
16
examples/asm/ch5/ch5.S
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@ -0,0 +1,16 @@
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# ch5.s
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# David_Harris@hmc.edu 14 December 2021
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.section .text.init
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.globl _start
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_start:
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lw x1, 4(x0)
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sw x1, 8(x0)
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add x2, x1, x1
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beq x1, x2, done
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loop:
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jal x0, loop
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done:
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.end
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38
examples/asm/ch5/ch5.debug
Normal file
38
examples/asm/ch5/ch5.debug
Normal file
@ -0,0 +1,38 @@
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ch5: file format elf64-littleriscv
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Disassembly of section .text:
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0000000000010078 <_start>:
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10078: 00402083 lw ra,4(zero) # 4 <_start-0x10074>
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1007c: 00102423 sw ra,8(zero) # 8 <_start-0x10070>
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10080: 00108133 add sp,ra,ra
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10084: 00208463 beq ra,sp,1008c <done>
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0000000000010088 <loop>:
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10088: 0000006f j 10088 <loop>
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Disassembly of section .riscv.attributes:
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0000000000000000 <.riscv.attributes>:
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0: 3241 addiw tp,tp,-16
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2: 0000 unimp
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4: 7200 ld s0,32(a2)
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6: 7369 lui t1,0xffffa
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8: 01007663 bgeu zero,a6,14 <_start-0x10064>
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c: 0028 addi a0,sp,8
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e: 0000 unimp
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10: 7205 lui tp,0xfffe1
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12: 3676 fld fa2,376(sp)
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14: 6934 ld a3,80(a0)
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16: 7032 0x7032
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18: 5f30 lw a2,120(a4)
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1a: 326d addiw tp,tp,-5
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1c: 3070 fld fa2,224(s0)
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1e: 615f 7032 5f30 0x5f307032615f
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24: 3266 fld ft4,120(sp)
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26: 3070 fld fa2,224(s0)
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28: 645f 7032 5f30 0x5f307032645f
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2e: 30703263 0x30703263
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...
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BIN
examples/asm/ch5/example
Executable file
BIN
examples/asm/ch5/example
Executable file
Binary file not shown.
2
examples/asm/example/Makefile
Normal file
2
examples/asm/example/Makefile
Normal file
@ -0,0 +1,2 @@
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example: example.S
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riscv64-unknown-elf-gcc -o example example.S
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BIN
examples/asm/example/example
Executable file
BIN
examples/asm/example/example
Executable file
Binary file not shown.
67
examples/asm/example/example.S
Normal file
67
examples/asm/example/example.S
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@ -0,0 +1,67 @@
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// example.s
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// David_Harris@hmc.edu 5 December 2021
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.section .text.init
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//.globl rvtest_entry_point
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//rvtest_entry_point:
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.globl main
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main:
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li a0, 42
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self_loop:
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j self_loop
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.end
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/*
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#include "model_test.h"
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#include "arch_test.h"
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RVTEST_ISA("RV32I")
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.section .text.init
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.globl rvtest_entry_point
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rvtest_entry_point:
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RVMODEL_BOOT
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RVTEST_CODE_BEGIN
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#ifdef TEST_CASE_1
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RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*);def TEST_CASE_1=True;",add)
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RVTEST_SIGBASE( x3,signature_x3_1)
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inst_0:
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// rs2 == rd != rs1, rs1==x4, rs2==x24, rd==x24, rs1_val > 0 and rs2_val > 0, rs2_val == 1, rs1_val == (2**(xlen-1)-1), rs1_val != rs2_val, rs1_val == 2147483647
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// opcode: add ; op1:x4; op2:x24; dest:x24; op1val:0x7fffffff; op2val:0x1
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TEST_RR_OP(add, x24, x4, x24, 0x80000000, 0x7fffffff, 0x1, x3, 0, x18)
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80000000 <rvtest_entry_point>:
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.section .text.init
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.globl rvtest_entry_point
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rvtest_entry_point:
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RVMODEL_BOOT
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RVTEST_CODE_BEGIN
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80000000: feedc0b7 lui ra,0xfeedc
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8
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80003220 <rvtest_code_end>:
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#endif
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RVTEST_CODE_END
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RVMODEL_HALT
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80003220: 00408093 addi ra,ra,4
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80003224: 00100093 li ra,1
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80003228 <write_tohost>:
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80003228: 00001f17 auipc t5,0x1
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8000322c: dc1f2c23 sw ra,-552(t5) # 80004000 <tohost>
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80003230 <self_loop>:
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80003230: 0000006f j 80003230 <self_loop>
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80003234: 0000 unimp
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...
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*/
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BIN
examples/asm/test
Executable file
BIN
examples/asm/test
Executable file
Binary file not shown.
22
examples/asm/test.S
Normal file
22
examples/asm/test.S
Normal file
@ -0,0 +1,22 @@
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.globl main
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.equ N, 5
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.data
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//A: .word 5, 42, −88, 2, −5033, 720, 314
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str1: .string "RISC-V"
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.align 2
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B: .word 0x32A
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.bss
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C: .space
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D: .space
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.balign 4
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.text
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main:
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li a0, 42
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jr ra
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.section .rodata
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str2: .string "Hello"
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.end
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@ -126,23 +126,17 @@ add wave -noupdate -group RegFile /testbench/dut/wallypipelinedsoc/hart/ieu/dp/r
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add wave -noupdate -group RegFile /testbench/dut/wallypipelinedsoc/hart/ieu/dp/regf/rd2
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add wave -noupdate -group RegFile /testbench/dut/wallypipelinedsoc/hart/ieu/dp/regf/we3
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add wave -noupdate -group RegFile /testbench/dut/wallypipelinedsoc/hart/ieu/dp/regf/wd3
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add wave -noupdate -group RegFile -group {write regfile mux} /testbench/dut/wallypipelinedsoc/hart/ieu/dp/ALUResultW
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add wave -noupdate -group RegFile -group {write regfile mux} /testbench/dut/wallypipelinedsoc/hart/ieu/dp/IntResultW
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add wave -noupdate -group RegFile -group {write regfile mux} /testbench/dut/wallypipelinedsoc/hart/ieu/dp/ReadDataW
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add wave -noupdate -group RegFile -group {write regfile mux} /testbench/dut/wallypipelinedsoc/hart/ieu/dp/CSRReadValW
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add wave -noupdate -group RegFile -group {write regfile mux} /testbench/dut/wallypipelinedsoc/hart/ieu/dp/ResultSrcW
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add wave -noupdate -group RegFile -group {write regfile mux} /testbench/dut/wallypipelinedsoc/hart/ieu/dp/ResultW
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add wave -noupdate -group alu /testbench/dut/wallypipelinedsoc/hart/ieu/dp/alu/a
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add wave -noupdate -group alu /testbench/dut/wallypipelinedsoc/hart/ieu/dp/alu/b
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add wave -noupdate -group alu /testbench/dut/wallypipelinedsoc/hart/ieu/dp/alu/alucontrol
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add wave -noupdate -group alu /testbench/dut/wallypipelinedsoc/hart/ieu/dp/alu/A
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add wave -noupdate -group alu /testbench/dut/wallypipelinedsoc/hart/ieu/dp/alu/B
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add wave -noupdate -group alu /testbench/dut/wallypipelinedsoc/hart/ieu/dp/alu/ALUControl
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add wave -noupdate -group alu /testbench/dut/wallypipelinedsoc/hart/ieu/dp/alu/result
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add wave -noupdate -group alu /testbench/dut/wallypipelinedsoc/hart/ieu/dp/alu/flags
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add wave -noupdate -group alu /testbench/dut/wallypipelinedsoc/hart/ieu/dp/alu/FlagsEEEEE
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add wave -noupdate -group alu -divider internals
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add wave -noupdate -group alu /testbench/dut/wallypipelinedsoc/hart/ieu/dp/alu/overflow
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add wave -noupdate -group alu /testbench/dut/wallypipelinedsoc/hart/ieu/dp/alu/carry
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add wave -noupdate -group alu /testbench/dut/wallypipelinedsoc/hart/ieu/dp/alu/zero
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add wave -noupdate -group alu /testbench/dut/wallypipelinedsoc/hart/ieu/dp/alu/neg
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add wave -noupdate -group alu /testbench/dut/wallypipelinedsoc/hart/ieu/dp/alu/lt
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add wave -noupdate -group alu /testbench/dut/wallypipelinedsoc/hart/ieu/dp/alu/ltu
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add wave -noupdate -group Forward /testbench/dut/wallypipelinedsoc/hart/ieu/fw/Rs1D
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add wave -noupdate -group Forward /testbench/dut/wallypipelinedsoc/hart/ieu/fw/Rs2D
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add wave -noupdate -group Forward /testbench/dut/wallypipelinedsoc/hart/ieu/fw/Rs1E
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@ -167,8 +161,8 @@ add wave -noupdate -group PCS /testbench/dut/wallypipelinedsoc/hart/PCE
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add wave -noupdate -group PCS /testbench/dut/wallypipelinedsoc/hart/PCM
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add wave -noupdate -group PCS /testbench/PCW
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add wave -noupdate -group muldiv /testbench/dut/wallypipelinedsoc/hart/mdu/InstrD
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add wave -noupdate -group muldiv /testbench/dut/wallypipelinedsoc/hart/mdu/SrcAE
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add wave -noupdate -group muldiv /testbench/dut/wallypipelinedsoc/hart/mdu/SrcBE
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add wave -noupdate -group muldiv /testbench/dut/wallypipelinedsoc/hart/mdu/ForwardedSrcAE
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add wave -noupdate -group muldiv /testbench/dut/wallypipelinedsoc/hart/mdu/ForwardedSrcBE
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add wave -noupdate -group muldiv /testbench/dut/wallypipelinedsoc/hart/mdu/Funct3E
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add wave -noupdate -group muldiv /testbench/dut/wallypipelinedsoc/hart/mdu/MulDivE
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add wave -noupdate -group muldiv /testbench/dut/wallypipelinedsoc/hart/mdu/W64E
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@ -151,11 +151,11 @@ add wave -noupdate -group RegFile -group {write regfile mux} /testbench/dut/hart
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add wave -noupdate -group RegFile -group {write regfile mux} /testbench/dut/hart/ieu/dp/CSRReadValW
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add wave -noupdate -group RegFile -group {write regfile mux} /testbench/dut/hart/ieu/dp/ResultSrcW
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add wave -noupdate -group RegFile -group {write regfile mux} /testbench/dut/hart/ieu/dp/ResultW
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add wave -noupdate -group alu /testbench/dut/hart/ieu/dp/alu/a
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add wave -noupdate -group alu /testbench/dut/hart/ieu/dp/alu/b
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add wave -noupdate -group alu /testbench/dut/hart/ieu/dp/alu/alucontrol
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add wave -noupdate -group alu /testbench/dut/hart/ieu/dp/alu/A
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add wave -noupdate -group alu /testbench/dut/hart/ieu/dp/alu/B
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add wave -noupdate -group alu /testbench/dut/hart/ieu/dp/alu/ALUControl
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add wave -noupdate -group alu /testbench/dut/hart/ieu/dp/alu/result
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add wave -noupdate -group alu /testbench/dut/hart/ieu/dp/alu/flags
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add wave -noupdate -group alu /testbench/dut/hart/ieu/dp/alu/FlagsE
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add wave -noupdate -group alu -divider internals
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add wave -noupdate -group alu /testbench/dut/hart/ieu/dp/alu/overflow
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add wave -noupdate -group alu /testbench/dut/hart/ieu/dp/alu/carry
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@ -499,7 +499,7 @@ add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/ALUResultE
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/WriteDataE
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/TargetBaseE
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/ALUResultM
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/ALUResultW
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/IntResultW
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/ResultW
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/regf/clk
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/regf/reset
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@ -562,27 +562,11 @@ add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/srcbmux/d0
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/srcbmux/d1
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/srcbmux/s
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/srcbmux/y
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/alu/a
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/alu/b
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||||
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/alu/alucontrol
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||||
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/alu/result
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||||
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/alu/flags
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||||
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/alu/condinvb
|
||||
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/alu/presum
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||||
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/alu/sum
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||||
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/alu/shift
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||||
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/alu/slt
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/alu/sltu
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||||
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/alu/bor
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||||
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/alu/right
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||||
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/alu/arith
|
||||
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/alu/w64
|
||||
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/alu/carry
|
||||
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/alu/zero
|
||||
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/alu/neg
|
||||
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/alu/lt
|
||||
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/alu/ltu
|
||||
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/alu/overflow
|
||||
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/alu/A
|
||||
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/alu/B
|
||||
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/alu/ALUControl
|
||||
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/alu/Result
|
||||
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/alu/FlagsE
|
||||
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/alu/sh/a
|
||||
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/alu/sh/amt
|
||||
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/alu/sh/right
|
||||
|
||||
@ -130,11 +130,11 @@ add wave -noupdate -group RegFile -group {write regfile mux} /testbench/dut/hart
|
||||
add wave -noupdate -group RegFile -group {write regfile mux} /testbench/dut/hart/ieu/dp/CSRReadValW
|
||||
add wave -noupdate -group RegFile -group {write regfile mux} /testbench/dut/hart/ieu/dp/ResultSrcW
|
||||
add wave -noupdate -group RegFile -group {write regfile mux} /testbench/dut/hart/ieu/dp/ResultW
|
||||
add wave -noupdate -group alu /testbench/dut/hart/ieu/dp/alu/a
|
||||
add wave -noupdate -group alu /testbench/dut/hart/ieu/dp/alu/b
|
||||
add wave -noupdate -group alu /testbench/dut/hart/ieu/dp/alu/alucontrol
|
||||
add wave -noupdate -group alu /testbench/dut/hart/ieu/dp/alu/A
|
||||
add wave -noupdate -group alu /testbench/dut/hart/ieu/dp/alu/B
|
||||
add wave -noupdate -group alu /testbench/dut/hart/ieu/dp/alu/ALUControl
|
||||
add wave -noupdate -group alu /testbench/dut/hart/ieu/dp/alu/result
|
||||
add wave -noupdate -group alu /testbench/dut/hart/ieu/dp/alu/flags
|
||||
add wave -noupdate -group alu /testbench/dut/hart/ieu/dp/alu/FlagsE
|
||||
add wave -noupdate -group alu -divider internals
|
||||
add wave -noupdate -group alu /testbench/dut/hart/ieu/dp/alu/overflow
|
||||
add wave -noupdate -group alu /testbench/dut/hart/ieu/dp/alu/carry
|
||||
|
||||
@ -127,23 +127,17 @@ add wave -noupdate -group RegFile /testbench/dut/hart/ieu/dp/regf/rd1
|
||||
add wave -noupdate -group RegFile /testbench/dut/hart/ieu/dp/regf/rd2
|
||||
add wave -noupdate -group RegFile /testbench/dut/hart/ieu/dp/regf/we3
|
||||
add wave -noupdate -group RegFile /testbench/dut/hart/ieu/dp/regf/wd3
|
||||
add wave -noupdate -group RegFile -group {write regfile mux} /testbench/dut/hart/ieu/dp/ALUResultW
|
||||
add wave -noupdate -group RegFile -group {write regfile mux} /testbench/dut/hart/ieu/dp/IntResultW
|
||||
add wave -noupdate -group RegFile -group {write regfile mux} /testbench/dut/hart/ieu/dp/ReadDataW
|
||||
add wave -noupdate -group RegFile -group {write regfile mux} /testbench/dut/hart/ieu/dp/CSRReadValW
|
||||
add wave -noupdate -group RegFile -group {write regfile mux} /testbench/dut/hart/ieu/dp/ResultSrcW
|
||||
add wave -noupdate -group RegFile -group {write regfile mux} /testbench/dut/hart/ieu/dp/ResultW
|
||||
add wave -noupdate -group alu /testbench/dut/hart/ieu/dp/alu/a
|
||||
add wave -noupdate -group alu /testbench/dut/hart/ieu/dp/alu/b
|
||||
add wave -noupdate -group alu /testbench/dut/hart/ieu/dp/alu/alucontrol
|
||||
add wave -noupdate -group alu /testbench/dut/hart/ieu/dp/alu/A
|
||||
add wave -noupdate -group alu /testbench/dut/hart/ieu/dp/alu/B
|
||||
add wave -noupdate -group alu /testbench/dut/hart/ieu/dp/alu/ALUControl
|
||||
add wave -noupdate -group alu /testbench/dut/hart/ieu/dp/alu/result
|
||||
add wave -noupdate -group alu /testbench/dut/hart/ieu/dp/alu/flags
|
||||
add wave -noupdate -group alu /testbench/dut/hart/ieu/dp/alu/FlagsE
|
||||
add wave -noupdate -group alu -divider internals
|
||||
add wave -noupdate -group alu /testbench/dut/hart/ieu/dp/alu/overflow
|
||||
add wave -noupdate -group alu /testbench/dut/hart/ieu/dp/alu/carry
|
||||
add wave -noupdate -group alu /testbench/dut/hart/ieu/dp/alu/zero
|
||||
add wave -noupdate -group alu /testbench/dut/hart/ieu/dp/alu/neg
|
||||
add wave -noupdate -group alu /testbench/dut/hart/ieu/dp/alu/lt
|
||||
add wave -noupdate -group alu /testbench/dut/hart/ieu/dp/alu/ltu
|
||||
add wave -noupdate -group Forward /testbench/dut/hart/ieu/fw/Rs1D
|
||||
add wave -noupdate -group Forward /testbench/dut/hart/ieu/fw/Rs2D
|
||||
add wave -noupdate -group Forward /testbench/dut/hart/ieu/fw/Rs1E
|
||||
@ -168,8 +162,8 @@ add wave -noupdate -expand -group PCS /testbench/dut/hart/PCE
|
||||
add wave -noupdate -expand -group PCS /testbench/dut/hart/PCM
|
||||
add wave -noupdate -expand -group PCS /testbench/PCW
|
||||
add wave -noupdate -group muldiv /testbench/dut/hart/mdu/InstrD
|
||||
add wave -noupdate -group muldiv /testbench/dut/hart/mdu/SrcAE
|
||||
add wave -noupdate -group muldiv /testbench/dut/hart/mdu/SrcBE
|
||||
add wave -noupdate -group muldiv /testbench/dut/hart/mdu/ForwardedSrcAE
|
||||
add wave -noupdate -group muldiv /testbench/dut/hart/mdu/ForwardedSrcBE
|
||||
add wave -noupdate -group muldiv /testbench/dut/hart/mdu/Funct3E
|
||||
add wave -noupdate -group muldiv /testbench/dut/hart/mdu/MulDivE
|
||||
add wave -noupdate -group muldiv /testbench/dut/hart/mdu/W64E
|
||||
@ -178,8 +172,6 @@ add wave -noupdate -group muldiv /testbench/dut/hart/mdu/StallW
|
||||
add wave -noupdate -group muldiv /testbench/dut/hart/mdu/FlushM
|
||||
add wave -noupdate -group muldiv /testbench/dut/hart/mdu/FlushW
|
||||
add wave -noupdate -group muldiv /testbench/dut/hart/mdu/MulDivResultW
|
||||
add wave -noupdate -group muldiv /testbench/dut/hart/mdu/genblk1/div/start
|
||||
add wave -noupdate -group muldiv /testbench/dut/hart/mdu/DivDoneM
|
||||
add wave -noupdate -group muldiv /testbench/dut/hart/mdu/DivBusyE
|
||||
add wave -noupdate -group divider /testbench/dut/hart/mdu/genblk1/div/fsm1/CURRENT_STATE
|
||||
add wave -noupdate -group divider /testbench/dut/hart/mdu/genblk1/div/N
|
||||
|
||||
Loading…
Reference in New Issue
Block a user