forked from Github_Repos/cvw
commit
0c459e5edd
@ -1,6 +1,6 @@
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// pmpcfg part 1
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// Kevin Wan, kewan@hmc.edu, 4/18/2023
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// Liam Chalk, lchalk@hmc.edu, 4/19/2023
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// Liam Chalk, lchalk@hmc.edu, 4/21/2023
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// locks each pmpXcfg bit field in order, from X = 15 to X = 0, with the A[1:0] field set to TOR.
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// See the next part in pmpcfg1.S
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@ -19,32 +19,37 @@ main:
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li t0, 0x90000000
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csrw pmpaddr0, t0
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li t0, 0x00000017
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li t0, 0x00001700
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csrw pmpcfg0, t0
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li t0, 0x90000000
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csrw pmpaddr0, t0
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li t0, 0x00001700
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csrw pmpcfg1, t0
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li t0, 0x90000000
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csrw pmpaddr0, t0
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li t0, 0x00000017
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li t0, 0x00001700
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csrw pmpcfg2, t0
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li t0, 0x90000000
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csrw pmpaddr0, t0
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li t0, 0x00000017
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li t0, 0x00001700
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csrw pmpcfg3, t0
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li t0, 0x90000000
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csrw pmpaddr1, t0
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li t0, 0x00000017
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li t0, 0x00001700
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csrw pmpcfg1, t0
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li t0, 0x90000000
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csrw pmpaddr1, t0
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li t0, 0x00000017
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csrw pmpaddr2, t0
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li t0, 0x00001700
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csrw pmpcfg2, t0
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li t0, 0x90000000
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csrw pmpaddr1, t0
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li t0, 0x00000017
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csrw pmpaddr3, t0
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li t0, 0x00001700
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csrw pmpcfg3, t0
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li t0, 0x8800000000000000
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