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cvw/wally-pipelined/regression/wave.do

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Wrote a bash script to generate custom modelsim radix which maps instruction addresses into human readable lables. Once combined with some simulation verilog this will display the current function in modelsim.
2021-02-18 04:20:28 +00:00
onerror {resume}
quietly WaveActivateNextPane {} 0
add wave -noupdate /testbench/clk
add wave -noupdate /testbench/reset
minor change to wave file.
2021-02-19 15:08:13 +00:00
add wave -noupdate -radix ascii /testbench/memfilename
Wrote a bash script to generate custom modelsim radix which maps instruction addresses into human readable lables. Once combined with some simulation verilog this will display the current function in modelsim.
2021-02-18 04:20:28 +00:00
add wave -noupdate -divider <NULL>
add wave -noupdate /testbench/dut/hart/ebu/IReadF
Hacked the sram memory models to reset their internal registers. This allows the simulation to run but is only temporary. About 149307ns of simulation run.
2021-02-19 03:32:15 +00:00
add wave -noupdate -expand -group HDU /testbench/dut/hart/DataStall
add wave -noupdate -expand -group HDU /testbench/dut/hart/InstrStall
minor change to wave file.
2021-02-19 15:08:13 +00:00
add wave -noupdate -expand -group HDU -color Yellow /testbench/dut/hart/hzu/FlushF
add wave -noupdate -expand -group HDU -color Yellow /testbench/dut/hart/FlushD
add wave -noupdate -expand -group HDU -color Yellow /testbench/dut/hart/FlushE
add wave -noupdate -expand -group HDU -color Yellow /testbench/dut/hart/FlushM
add wave -noupdate -expand -group HDU -color Yellow /testbench/dut/hart/FlushW
add wave -noupdate -expand -group HDU -color Orange /testbench/dut/hart/StallF
add wave -noupdate -expand -group HDU -color Orange /testbench/dut/hart/StallD
Wrote a bash script to generate custom modelsim radix which maps instruction addresses into human readable lables. Once combined with some simulation verilog this will display the current function in modelsim.
2021-02-18 04:20:28 +00:00
add wave -noupdate -expand -group Bpred -expand -group direction -divider Update
add wave -noupdate -expand -group Bpred -expand -group direction /testbench/dut/hart/ifu/bpred/DirPredictor/UpdatePC
add wave -noupdate -expand -group Bpred -expand -group direction /testbench/dut/hart/ifu/bpred/DirPredictor/UpdateEN
add wave -noupdate -expand -group Bpred -expand -group direction /testbench/dut/hart/ifu/bpred/DirPredictor/UpdatePCIndex
add wave -noupdate -expand -group Bpred -expand -group direction /testbench/dut/hart/ifu/bpred/DirPredictor/UpdatePrediction
add wave -noupdate -expand -group Bpred -expand -group direction /testbench/dut/hart/ifu/bpred/DirPredictor/memory/memory
add wave -noupdate -expand -group InstrClass /testbench/dut/hart/ifu/bpred/InstrClassF
add wave -noupdate -expand -group InstrClass /testbench/dut/hart/ifu/bpred/InstrClassD
add wave -noupdate -expand -group InstrClass /testbench/dut/hart/ifu/bpred/InstrClassE
add wave -noupdate /testbench/dut/hart/ifu/bpred/InstrF
Hacked the sram memory models to reset their internal registers. This allows the simulation to run but is only temporary. About 149307ns of simulation run.
2021-02-19 03:32:15 +00:00
add wave -noupdate /testbench/dut/hart/ifu/bpred/BPPredWrongE
add wave -noupdate /testbench/dut/hart/ifu/PCNextF
add wave -noupdate /testbench/dut/hart/ifu/PCF
add wave -noupdate /testbench/dut/hart/ifu/PCPlus2or4F
add wave -noupdate /testbench/dut/hart/ifu/PCNext0F
add wave -noupdate /testbench/dut/hart/ifu/PCNext1F
add wave -noupdate /testbench/dut/hart/ifu/SelBPPredF
add wave -noupdate /testbench/dut/hart/ifu/bpred/BTBValidF
add wave -noupdate /testbench/dut/hart/ifu/bpred/BPPredF
add wave -noupdate /testbench/dut/hart/ifu/bpred/TargetPredictor/ValidBits
add wave -noupdate /testbench/dut/hart/ifu/bpred/TargetPredictor/LookUpPCIndexQ
add wave -noupdate /testbench/dut/hart/ifu/bpred/TargetPredictor/UpdatePCIndexQ
add wave -noupdate /testbench/dut/hart/ifu/bpred/TargetPredictor/LookUpPC
add wave -noupdate -expand -group {bp wrong} /testbench/dut/hart/ifu/bpred/TargetWrongE
add wave -noupdate -expand -group {bp wrong} /testbench/dut/hart/ifu/bpred/FallThroughWrongE
add wave -noupdate -expand -group {bp wrong} /testbench/dut/hart/ifu/bpred/PredictionDirWrongE
add wave -noupdate -expand -group {bp wrong} /testbench/dut/hart/ifu/bpred/PredictionPCWrongE
add wave -noupdate -expand -group {bp wrong} /testbench/dut/hart/ifu/bpred/BPPredWrongE
add wave -noupdate -expand -group BTB -divider Update
add wave -noupdate -expand -group BTB /testbench/dut/hart/ifu/bpred/TargetPredictor/UpdateEN
add wave -noupdate -expand -group BTB /testbench/dut/hart/ifu/bpred/TargetPredictor/UpdatePC
add wave -noupdate -expand -group BTB /testbench/dut/hart/ifu/bpred/TargetPredictor/UpdateTarget
add wave -noupdate -expand -group {Execution Stage} /testbench/dut/hart/ifu/PCE
add wave -noupdate -expand -group {Execution Stage} /testbench/dut/hart/ifu/InstrE
Wrote a bash script to generate custom modelsim radix which maps instruction addresses into human readable lables. Once combined with some simulation verilog this will display the current function in modelsim.
2021-02-18 04:20:28 +00:00
TreeUpdate [SetDefaultTree]
minor change to wave file.
2021-02-19 15:08:13 +00:00
WaveRestoreCursors {{Cursor 1} {137177 ns} 0}
Wrote a bash script to generate custom modelsim radix which maps instruction addresses into human readable lables. Once combined with some simulation verilog this will display the current function in modelsim.
2021-02-18 04:20:28 +00:00
quietly wave cursor active 1
configure wave -namecolwidth 250
configure wave -valuecolwidth 185
configure wave -justifyvalue left
configure wave -signalnamewidth 1
configure wave -snapdistance 10
configure wave -datasetprefix 0
configure wave -rowmargin 4
configure wave -childrowmargin 2
configure wave -gridoffset 0
configure wave -gridperiod 1
configure wave -griddelta 40
configure wave -timeline 0
configure wave -timelineunits ns
update
minor change to wave file.
2021-02-19 15:08:13 +00:00
WaveRestoreZoom {136946 ns} {137442 ns}
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