cvw/pipelined/src/lsu/atomic.sv

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///////////////////////////////////////////
// atomic.sv
//
// Written: Ross Thompson ross1728@gmail.com January 31, 2022
// Modified:
//
// Purpose: atomic data path.
//
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// A component of the CORE-V-WALLY configurable RISC-V project.
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//
// Copyright (C) 2021-23 Harvey Mudd College & Oklahoma State University
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//
// SPDX-License-Identifier: Apache-2.0 WITH SHL-2.1
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//
// Licensed under the Solderpad Hardware License v 2.1 (the “License”); you may not use this file
// except in compliance with the License, or, at your option, the Apache License version 2.0. You
// may obtain a copy of the License at
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//
// https://solderpad.org/licenses/SHL-2.1/
//
// Unless required by applicable law or agreed to in writing, any work distributed under the
// License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
// either express or implied. See the License for the specific language governing permissions
// and limitations under the License.
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////////////////////////////////////////////////////////////////////////////////////////////////
`include "wally-config.vh"
module atomic (
input logic clk,
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input logic reset, StallW,
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input logic [`XLEN-1:0] ReadDataM,
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input logic [`XLEN-1:0] IHWriteDataM,
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input logic [`PA_BITS-1:0] PAdrM,
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input logic [6:0] LSUFunct7M,
input logic [2:0] LSUFunct3M,
input logic [1:0] LSUAtomicM,
input logic [1:0] PreLSURWM,
input logic IgnoreRequest,
output logic [`XLEN-1:0] IMAWriteDataM,
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output logic SquashSCW,
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output logic [1:0] LSURWM
);
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logic [`XLEN-1:0] AMOResult;
logic MemReadM;
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amoalu amoalu(.srca(ReadDataM), .srcb(IHWriteDataM), .funct(LSUFunct7M), .width(LSUFunct3M[1:0]),
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.result(AMOResult));
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mux2 #(`XLEN) wdmux(IHWriteDataM, AMOResult, LSUAtomicM[1], IMAWriteDataM);
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assign MemReadM = PreLSURWM[1] & ~IgnoreRequest;
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lrsc lrsc(.clk, .reset, .StallW, .MemReadM, .PreLSURWM, .LSUAtomicM, .PAdrM, .SquashSCW, .LSURWM);
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endmodule