Ross Thompson 8d88ef93bc Fixed a very subtle combinational loop bug the SSTC implementation of csrs.sv. STIMCMPH did not assign all XLEN bits of CSRSReadValM so dc_shell produced d-latches and vivado created a combinational loop.		2023-07-28 11:20:29 -05:00
..
csr.sv	Fixed csr typos	2023-07-02 02:01:40 -07:00
csrc.sv	Fixed bug with performance counters not tracking the correct number of requested icache and dcache memory operations.	2023-07-14 16:31:44 -05:00
csri.sv	Added environment configuration control (menvcfg/senvcfg) of cbo instructions	2023-07-02 01:52:25 -07:00
csrm.sv	Removed QEMU from configurations.	2023-07-19 10:23:55 -05:00
csrs.sv	Fixed a very subtle combinational loop bug the SSTC implementation of csrs.sv. STIMCMPH did not assign all XLEN bits of CSRSReadValM so dc_shell produced d-latches and vivado created a combinational loop.	2023-07-28 11:20:29 -05:00
csrsr.sv	Removed QEMU from configurations.	2023-07-19 10:23:55 -05:00
csru.sv	Update csru.sv	2023-06-12 20:21:55 -07:00
privdec.sv	Clean up privilege rs1 decoding and implement svinval as sfence.vma	2023-07-13 02:41:17 -07:00
privileged.sv	Clean up privilege rs1 decoding and implement svinval as sfence.vma	2023-07-13 02:41:17 -07:00
privmode.sv	Update privmode.sv	2023-06-12 20:27:48 -07:00
privpiperegs.sv	The privileged unit is parameterized using Lim's method.	2023-05-26 12:03:46 -05:00
trap.sv	Update trap.sv	2023-06-12 20:31:44 -07:00