Rose Thompson 77d47e531f Merge branch 'main' into lrufixes		2024-11-13 10:34:21 -06:00
..
checksignature.sv	Significant refactoring of testbench.	2023-06-14 17:02:49 -05:00
DCacheFlushFSM.sv	Updated email address authorship for my files.	2024-10-15 10:27:53 -05:00
functionName.sv	Updated email address authorship for my files.	2024-10-15 10:27:53 -05:00
instrNameDecTB.sv	Eliminate more logical operators and replace with bitwise	2024-05-15 10:50:23 -07:00
instrTrackerTB.sv	More code cleanup	2024-06-14 09:50:07 -07:00
loggers.sv	Merge branch 'main' into lrufixes	2024-11-13 10:34:21 -06:00
ramxdetector.sv	Yay! I got verilator to compile our testbench! Does it actually work I don't know.	2023-12-18 16:44:34 -06:00
riscvassertions.sv	Depricate conditional generation based on A_SUPPORTED, which is now computed from ZALRSC_SUPPORTED and ZAAMO_SUPPORTED	2024-08-08 05:27:35 -07:00
rvvitbwrapper.sv	Updated email address authorship for my files.	2024-10-15 10:27:53 -05:00
wallyTracer.sv	Adding DUT signals to the tracer for VM Coverage	2024-10-07 03:52:36 -07:00
watchdog.sv	Updated email address authorship for my files.	2024-10-15 10:27:53 -05:00