Ross Thompson a1c26a16d6 Cleaned up the linux testbench by removing old code and signals. ... Added back in the csr checking logic. Added code to force timer, external, and software interrupts by using the expected values from qemu's (m/s)cause registers. Still need to prevent wally's timer interrupt.		2021-08-13 14:39:05 -05:00
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common	Moved the test bench modules to a common directory.	2021-07-30 14:16:14 -05:00
imperas-boottim.txt	added sfence to legal instructions, zeroed out rom file to populate for tests	2021-07-23 15:55:08 -04:00
testbench-coremark_bare.sv	Moved the test bench modules to a common directory.	2021-07-30 14:16:14 -05:00
testbench-coremark.sv	Moved the test bench modules to a common directory.	2021-07-30 14:16:14 -05:00
testbench-imperas.sv	Moved the test bench modules to a common directory.	2021-07-30 14:16:14 -05:00
testbench-linux.sv	Cleaned up the linux testbench by removing old code and signals.	2021-08-13 14:39:05 -05:00
testbench-privileged.sv	Moved the test bench modules to a common directory.	2021-07-30 14:16:14 -05:00