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bp-results
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Last little hickups out of the branch predictor results parsing.
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2023-11-27 00:35:22 -06:00 |
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slack-notifier
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Renamed regression to sim
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2023-02-02 14:48:23 -08:00 |
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wave-dos
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Renamed regression to sim
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2023-02-02 14:48:23 -08:00 |
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bpred-sim.py
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Changes to support concurrent simulation of all the branch predictor sweeps.
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2023-11-26 22:19:34 -06:00 |
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buildrootBugFinder.py
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Renamed wally-piplined.do to wally.do
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2023-02-04 04:38:41 -08:00 |
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coverage
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tlbNAPOT hangs due to PBMT making instruction memory uncacheable, and spill logic not working there. Fixed TLBLRU to update recently used on TLBHit rather than CAMHit. Moved coverage exclusions to proper line in pmachecker
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2023-09-02 12:56:36 -07:00 |
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coverage-exclusions-rv64gc.do
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Added Wally github address to header comments
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2024-01-29 05:38:11 -08:00 |
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FPbuild.txt
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Update sim-testfloat to fix errors due to bad config element. I am not sure of the reasoning, but the specific path to the testvector was not getting inserted in Questa. This modification also adds features to test individualized tests (.e.g, binary16 only) -- documentation is added in the FPbuild.txt file
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2023-06-20 17:26:54 -05:00 |
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fpga-wave.do
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Renamed regression to sim
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2023-02-02 14:48:23 -08:00 |
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GetLineNum.do
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track GetLinenum.do (tcl procedure to find line numbers to exclude)
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2023-04-12 15:58:38 -07:00 |
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imperas.ic
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HPTW coverage improvements
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2024-01-26 10:46:38 -08:00 |
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lint-wally
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Fixed logic to work with FLEN < XLEN
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2024-01-31 20:24:16 -08:00 |
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linux-wave.do
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Modified the imperas linux scripts so they run without reporting hundreds of gigabytes of data.
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2023-04-26 17:29:57 -05:00 |
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make-tests.sh
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Renamed regression to sim
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2023-02-02 14:48:23 -08:00 |
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Makefile
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All deriv tests generated, use sim/make deriv
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2024-01-29 14:34:42 -08:00 |
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makefile-memfile
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Renamed regression to sim
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2023-02-02 14:48:23 -08:00 |
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regression-wally
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Removed AHB-specific testing and replaced with ram configs
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2024-01-31 20:35:34 -08:00 |
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run-imperas-linux.sh
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Modified linux imperas tests to
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2023-11-20 10:30:35 -06:00 |
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run-imperasdv-tests.bash
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Revert "Update for new layout of ImperasDV files"
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2023-06-13 04:17:56 -07:00 |
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rv64gc_CacheSim.py
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Added Wally github address to header comments
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2024-01-29 05:38:11 -08:00 |
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sim-buildroot
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Renamed wally-piplined.do to wally.do
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2023-02-04 04:38:41 -08:00 |
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sim-buildroot-batch
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Renamed wally-piplined.do to wally.do
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2023-02-04 04:38:41 -08:00 |
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sim-imperas
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Added Wally github address to header comments
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2024-01-29 05:38:11 -08:00 |
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sim-testfloat
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IEEE754 derivatives for testfloat
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2024-01-30 09:49:27 -08:00 |
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sim-testfloat-batch
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IEEE754 derivatives for testfloat
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2024-01-30 09:49:27 -08:00 |
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sim-wally
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hardware interlock
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2023-10-30 17:00:20 -07:00 |
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sim-wally-batch
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code review harris
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2023-10-31 12:27:41 -07:00 |
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test
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Renamed regression to sim
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2023-02-02 14:48:23 -08:00 |
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testfloat.do
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IEEE754 derivatives for testfloat
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2024-01-30 09:49:27 -08:00 |
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verilate
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Verilate running (slowly)
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2024-01-07 21:30:33 -08:00 |
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wally-batch.do
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Removed AHB-specific testing and replaced with ram configs
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2024-01-31 20:35:34 -08:00 |
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wally-imperas-cov.do
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add changes for latest IDV file layout
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2023-06-16 16:43:53 +01:00 |
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wally-imperas-no-idv.do
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add changes for latest IDV file layout
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2023-06-16 16:43:53 +01:00 |
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wally-imperas.do
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Added missing files.
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2023-10-13 15:10:58 -05:00 |
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wally-linux-imperas.do
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Reduced imperas linux run time to 10 seconds.
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2023-12-04 00:00:26 -06:00 |
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wally.do
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Removed AHB-specific testing and replaced with ram configs
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2024-01-31 20:35:34 -08:00 |
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wally.xrun
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Got xcelium running wally, but it fails to actually preload the memories.
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2023-07-12 13:56:57 -05:00 |
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wave-all.do
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Renamed regression to sim
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2023-02-02 14:48:23 -08:00 |
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wave-fpu.do
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Add reset to wave window
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2023-06-29 08:47:16 -05:00 |
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wave.do
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Fixed bug 546. non-leaf non-zero PBMT bit raise page fault.
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2024-01-05 17:10:14 -06:00 |
