cvw/wally-pipelined/src
Ross Thompson 9adcf86a40 Modified the icache memory to read using the virtual (non physical) address in the PCNextF stage.
This allows recovering from an ITLBMiss to be 1 cycle after and simplifies the hptw slightly.
2021-12-19 14:57:42 -06:00
..
cache Modified the icache memory to read using the virtual (non physical) address in the PCNextF stage. 2021-12-19 14:57:42 -06:00
ebu Simplified ALU and source multiplexers pass tests 2021-12-13 07:57:38 -08:00
fpu Simplified FWriteInt interfaces by merging into RegWrite 2021-12-18 05:36:32 -08:00
generic Merge branch 'main' into fpga 2021-11-29 10:06:53 -06:00
hazard Added proper credit to Richard Davis, the author of the original sd card reader. 2021-12-12 15:05:50 -06:00
ieu Shared ALU mux input for shifts 2021-12-18 10:08:52 -08:00
ifu Modified the icache memory to read using the virtual (non physical) address in the PCNextF stage. 2021-12-19 14:57:42 -06:00
lsu Modified the icache memory to read using the virtual (non physical) address in the PCNextF stage. 2021-12-19 14:57:42 -06:00
mmu Modified the icache memory to read using the virtual (non physical) address in the PCNextF stage. 2021-12-19 14:57:42 -06:00
muldiv Removed .* from hazard hzu(.*) in wallypipelinedhart.sv. 2021-11-17 14:08:08 -08:00
privileged Renamed MemAdrM to IEUAdrM. This will free the name MemAdrm for use in the DCache. 2021-12-19 14:00:30 -06:00
sdc Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main 2021-12-12 17:21:51 -06:00
uncore Oups missed files in the last commit. 2021-12-15 10:25:08 -06:00
wally Renamed MemAdrM to IEUAdrM. This will free the name MemAdrm for use in the DCache. 2021-12-19 14:00:30 -06:00