cvw/src
2023-10-19 11:16:02 -07:00
..
cache Modified log2 coding to avoid synthesis warning 2023-10-19 11:16:02 -07:00
ebu Improved the critical path even more. The Arty A7 works upto 19Mhz easily. Testing out 22Mhz now. 2023-07-21 16:31:26 -05:00
fpu Renamed wally-config to config in many comments 2023-10-16 13:49:09 -07:00
generic Merge branch 'boot' into mergeBoot 2023-07-21 17:43:45 -05:00
hazard
ieu minfo test working again with mconfigptr for RV64 2023-10-15 06:41:52 -07:00
ifu Added ZCA/ZCF/ZCD/ZCB support. Doesn't break regression, but not tested. Need to get tests for Zcb. Draft tests are in riscv-arch-test but not yet committed there 2023-10-04 12:28:12 -07:00
lsu Added MENVCFG.HADE bit and updated SVADU to depend on this bit 2023-10-04 09:34:28 -07:00
mdu
mmu UpdateDA cleanup: don't assert UpdateDA when there is no SVADU 2023-10-04 09:57:13 -07:00
privileged minfo test working again with mconfigptr for RV64 2023-10-15 06:41:52 -07:00
uncore Removed unnecessary RV64 PWDATA muxing from AHB peripherals because LSU already replicates 2023-10-18 05:50:41 -07:00
wally Added MENVCFG.HADE bit and updated SVADU to depend on this bit 2023-10-04 09:34:28 -07:00
cvw.sv Added ZCA/ZCF/ZCD/ZCB support. Doesn't break regression, but not tested. Need to get tests for Zcb. Draft tests are in riscv-arch-test but not yet committed there 2023-10-04 12:28:12 -07:00