Rose Thompson 46fdfde7ec Removed unnecessary display from testbench.		2024-04-06 16:10:18 -05:00
..
bp-results	Updates to branch predictor collection.	2024-03-29 13:52:28 -05:00
questa	Removed unnecessary display from testbench.	2024-04-06 16:10:18 -05:00
slack-notifier
vcs	Reorganizing sim directory for multiple simulators	2024-04-05 18:19:46 -07:00
verilator	Reorganizing sim directory for multiple simulators	2024-04-05 18:19:46 -07:00
xcelium	Reorganizing sim directory for multiple simulators	2024-04-05 18:19:46 -07:00
bpred-sim.py	Changes to support concurrent simulation of all the branch predictor sweeps.	2023-11-26 22:19:34 -06:00
buildrootBugFinder.py
coverage	tlbNAPOT hangs due to PBMT making instruction memory uncacheable, and spill logic not working there. Fixed TLBLRU to update recently used on TLBHit rather than CAMHit. Moved coverage exclusions to proper line in pmachecker	2023-09-02 12:56:36 -07:00
FPbuild.txt	Update sim-testfloat to fix errors due to bad config element. I am not sure of the reasoning, but the specific path to the testvector was not getting inserted in Questa. This modification also adds features to test individualized tests (.e.g, binary16 only) -- documentation is added in the FPbuild.txt file	2023-06-20 17:26:54 -05:00
imperas.ic	HPTW coverage improvements	2024-01-26 10:46:38 -08:00
make-tests.sh
Makefile	Added Zfh and Zfa tests to wally-riscv-arch-test until they are accepted in riscv-arch-test repo	2024-03-14 10:49:36 -07:00
makefile-memfile
run-imperas-linux.sh	Added UART output file buildroot_uart.out for Linux test 'buildroot'.	2024-04-05 17:18:03 -07:00
run-imperasdv-tests.bash
rv64gc_CacheSim.py	Added Wally github address to header comments	2024-01-29 05:38:11 -08:00
test