Ross Thompson f3d611c686 Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main		2022-08-31 11:38:29 -05:00
..
slack-notifier
wave-dos	Added generate around uncore.	2022-08-25 10:35:24 -05:00
wkdir
buildrootBugFinder.py
fpga-wave.do	Added generate around uncore.	2022-08-25 10:35:24 -05:00
lint-wally
linux-wave.do	Added generate around uncore.	2022-08-25 10:35:24 -05:00
make-tests.sh
Makefile	More riscof makefile tuning	2022-07-25 21:15:56 +00:00
makefile-memfile	plic-s debug	2022-08-03 12:33:09 +00:00
regression-wally	Preliminary work to make DTIM and Bus compatible. Not yet working because accesses to bus are causing illegal address faults on the bus.	2022-08-27 20:31:09 -07:00
sim-buildroot
sim-buildroot-batch
sim-testfloat	fixed error in divsqrt	2022-07-14 18:16:00 +00:00
sim-testfloat-batch	fixed error in divsqrt	2022-07-14 18:16:00 +00:00
sim-wally	Preliminary work to make DTIM and Bus compatible. Not yet working because accesses to bus are causing illegal address faults on the bus.	2022-08-27 20:31:09 -07:00
sim-wally-batch	Fixed address decoder hanging buildroot	2022-08-26 22:01:25 -07:00
testfloat.do	Fixed checking termination in testfloat testbench	2022-08-30 10:55:21 -07:00
wally-harvard.do
wally-pipelined-batch.do	Fixed address decoder hanging buildroot	2022-08-26 22:01:25 -07:00
wally-pipelined.do	Temporary commit.	2022-08-30 15:40:42 -05:00
wave-all.do	Added generate around uncore.	2022-08-25 10:35:24 -05:00
wave-fpu.do	Separated out radix 2 and radix 4 stages into different modules	2022-08-29 04:26:14 -07:00
wave.do	Maybe fixed it?	2022-08-30 18:08:34 -05:00