Ross Thompson 6907f0ccc1 FPGA makefile update.		2023-04-25 16:24:26 -05:00
..
debug
bootrom.txt
insert_debug_comment.sh
Makefile	FPGA makefile update.	2023-04-25 16:24:26 -05:00
probe
wally.tcl	Adding in the ILA to the arty a7.	2023-04-17 14:54:10 -05:00
wave_config.wcfg
xlnx_ahblite_axi_bridge.tcl
xlnx_axi_clock_converter.tcl
xlnx_ddr3-artya7-mig.prj	It's almost working.	2023-04-18 14:24:59 -05:00
xlnx_ddr3-ArtyA7.tcl
xlnx_ddr4-vcu108.tcl
xlnx_ddr4-vcu118.tcl
xlnx_ddr4.tcl
xlnx_mmcm.tcl	Lowered arty a7 clock frequency to 15Mhz to meet timing. can probalby go faster.	2023-04-17 12:16:31 -05:00
xlnx_proc_sys_reset.tcl