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Author	SHA1	Message	Date
David Harris	788189b87e	Merge pull request #1102 from jordancarlin/arch_test_update ... Update riscv-arch-test with PMP and sv32 VM	2024-11-16 16:32:25 -08:00
David Harris	38bf0711dc	Merge pull request #1106 from jordancarlin/rv32lockstep ... Add rv32 wally-riscv-arch-test lockstep to nightly	2024-11-16 16:31:04 -08:00
David Harris	afeb1ca9a9	Merge pull request #1110 from coreyqh/dev ... Add ZicsrU to fcov	2024-11-16 16:30:10 -08:00
Corey Hickson	def3b46afa	Add ZicsrU to fcov	2024-11-16 14:13:54 -08:00
Jordan Carlin	00d02e5656	fix testbench	2024-11-16 12:53:10 -08:00
Jacob Pease	2dcfe10013	Merged changes and reverted my commits.	2024-11-16 14:50:06 -06:00
Jordan Carlin	f6b0805fd4	More lint cleanup: remove unused params	2024-11-16 12:35:37 -08:00
Jacob Pease	dda3cd6bea	Removed unnecessary separate if statement.	2024-11-16 14:29:58 -06:00
David Harris	56cbcf222b	Merge pull request #1107 from jordancarlin/lint ... Clean up verilator lint off commands and remove unnecessay ones	2024-11-16 12:16:52 -08:00
Jordan Carlin	1675e4cb7d	Add rv32 wally-riscv-arch-test lockstep to nightly	2024-11-16 11:53:05 -08:00
Jordan Carlin	41a2326609	Merge pull request #1105 from davidharrishmc/dev ... Changed reservation set size to one word	2024-11-16 11:50:52 -08:00
David Harris	45f6cb055d	Changed reservation set size to one word to fix RV32GC lrsc privileged test failure Issue #1092	2024-11-16 11:47:45 -08:00
Jordan Carlin	b6b1fc82ab	Merge pull request #1104 from davidharrishmc/dev ... Privileged functional coverage tests run in regression-wally --fcov	2024-11-16 10:27:12 -08:00
David Harris	98f2ec6d66	Updated regression-wally --fcov to run privileged tests in lockstep	2024-11-16 09:58:04 -08:00
Jacob Pease	2ee4525ba9	Made minor changes to the controller to clean up the logic. Still need to simplify the first always block.	2024-11-16 11:34:31 -06:00
Jordan Carlin	a462b9a2e6	Clean up verilator lint off commands and remove unnecessay ones	2024-11-15 23:52:50 -08:00
Jordan Carlin	2b57633217	Switch to out of tree riscv-arch-test with VM tests + add pmp & vm tests to testbench	2024-11-15 22:52:21 -08:00
Jordan Carlin	c926792941	Update riscv-arch-test	2024-11-15 20:24:03 -08:00
David Harris	234e47a7c5	MTIMECMP should reset to maximum value for RV32, not just for RV64	2024-11-15 15:37:25 -08:00
David Harris	d4852d88e2	Merge pull request #1101 from rosethompson/main ... Fixed the tracer so that traps don't clear the instruction or PC bits.	2024-11-15 06:33:28 -08:00
Rose Thompson	fcf4ca1417	Disabled tracer print.	2024-11-15 08:32:43 -06:00
Rose Thompson	3596be433c	Fixed the tracer so that traps don't clear the instruction or PC bits.	2024-11-15 08:31:19 -06:00
Rose Thompson	fbd89eef83	Merge pull request #1100 from davidharrishmc/dev ... Fixed tracer warnings, removed fcovimp support	2024-11-15 08:00:10 -06:00
David Harris	cb4f1bec8e	Removed fcovimp support	2024-11-15 05:58:30 -08:00
David Harris	c02a649c3b	Fixed warnings related to tracer variables	2024-11-15 05:33:16 -08:00
David Harris	d4ecaa5401	Merge pull request #1099 from 10x-Engineers/rvvi_setup ... Removing old code (not in use anymore)	2024-11-15 04:57:29 -08:00
Huda-10xe	b2789f304a	Removing old code (not in use anymore)	2024-11-15 00:39:16 -08:00
David Harris	e5e592b2da	Merge pull request #1091 from jordancarlin/rvvi32 ... Fix RVVI for RV32	2024-11-14 15:33:48 -08:00
Jordan Carlin	9d2a5c6e03	Fix wallyTracer bug	2024-11-14 15:31:10 -08:00
Jordan Carlin	51d7eea98a	Merge branch 'main' of https://github.com/openhwgroup/cvw into rvvi32	2024-11-14 15:04:11 -08:00
Jordan Carlin	61c5d035e9	Add mseccfg shell to wallyTracer and reformat CSRs	2024-11-14 15:03:13 -08:00
Jordan Carlin	3dbfc2f9fc	Merge pull request #1098 from rosethompson/main ... Fixes issue with traps hidding instructions on rvvi interface	2024-11-14 14:44:20 -08:00
Rose Thompson	d311ee238c	Merge branch 'openhwgroup:main' into main	2024-11-14 16:15:26 -06:00
Rose Thompson	5e4f4c2072	Simple change to ensure Trapped instructions are included with rvvi as ... valid instructions. Required for functional coverage.	2024-11-14 16:14:02 -06:00
Rose Thompson	06fb807839	Merge pull request #1096 from davidharrishmc/dev ... XLEN32 support for functional coverage, restore WALLY-init-lib	2024-11-14 15:28:20 -06:00
Jordan Carlin	60bc968b29	Merge pull request #1097 from slmnemo/main ... Fixed oversight in assertions on verilator causing nocache_rv64gc and nodcache_rv64gc to fail	2024-11-14 12:02:37 -08:00
slmnemo	872491716d	set ZICCLSM_SUPPORTED to 0 so that nocache_rv64gc does not fail assertion tests	2024-11-14 12:00:45 -08:00
David Harris	4251f0c6a2	Restored to original WALLY-init-lib beause new flavor is moved to cvw-arch-verif and the old is needed for PMP code coverage	2024-11-14 10:56:13 -08:00
David Harris	8e6170cc83	Merge branch 'main' of https://github.com/openhwgroup/cvw into dev	2024-11-14 08:15:44 -08:00
David Harris	054c694a27	Fixed typo of CLINT name	2024-11-14 08:14:56 -08:00
David Harris	eacc8c0f07	Define XLEN32/XLEN64 in coverage configuration	2024-11-14 08:14:22 -08:00
Ahlyssa Santillana	d41dc8d2de	incorportated Zicsr to run in Imperas	2024-11-14 06:26:28 -08:00
David Harris	669855ad25	Merge pull request #1093 from AnonymousVikram/fflag_fix ... Fflag Fix	2024-11-14 04:33:58 -08:00
Vikram Krishna	0c0949e82b	added explanation	2024-11-14 03:54:32 -08:00
Vikram Krishna	eb777d3fa4	updated froundnx conditional	2024-11-14 03:53:26 -08:00
Vikram Krishna	4aecba2a51	added handling for OpCode=100	2024-11-14 03:51:27 -08:00
Jordan Carlin	14e9a39523	pmps working for RVVI in RV32	2024-11-13 22:12:11 -08:00
Jordan Carlin	d666a0dd7b	Update formatting in an attempt to understand what's happening in this file	2024-11-13 18:26:53 -08:00
Jordan Carlin	017b3e9872	Fix 32 bit CSRs in wallyTracer	2024-11-13 17:01:01 -08:00
Rose Thompson	88745e27d3	Fixed ila after updates.	2024-11-13 12:57:02 -06:00