Commit Graph

13 Commits

Author SHA1 Message Date
Ross Thompson
87aaec3b6c Partial cleanup of unused signals in caches and bpred. 2021-10-24 15:04:20 -05:00
Ross Thompson
f1107c5d7b Corrected a number of bugs in the branch predictor.
Added performance counters to individually track
branches; jumps, jump register, jal, and jalr; return.
jump and jump register are special cases of jal and jalr.
Similarlly return is a special case of jalr.
Also added counters to track if the branch direction was wrong,
btb target wrong, or the ras target was wrong.
Finally added one more counter to track if the BP incorrectly predicts
a non-cfi instruction.
2021-03-31 11:54:02 -05:00
Ross Thompson
a3925505bf fixed some bugs with the RAS. 2021-03-30 13:57:40 -05:00
Ross Thompson
72d25d4443 Fixed a bunch of bugs with the RAS. 2021-03-23 21:49:16 -05:00
Ross Thompson
c318606f05 Fixed the valid bit issue. Now the branch predictor is actually predicting instructions. 2021-03-23 20:20:23 -05:00
Ross Thompson
9d5c351340 fixed issue with BTB's valid bit not updating. There is still a problem is valid not ocurring in the correct clock cycle. 2021-03-23 20:06:45 -05:00
Ross Thompson
dee5d16850 fixed a whole bunch of bugs with the branch predictor. Still an issue with how PCNextF is not updated because the CPU is stalled. 2021-03-23 16:53:48 -05:00
Ross Thompson
9a93193d6a Oups. I forgot to update other do files with the commands to preload the branch predictor memories. 2021-03-05 15:23:53 -06:00
Ross Thompson
a8cd4f2b2e Fixed forwarding around the 2 bit predictor. 2021-03-04 13:01:41 -06:00
Ross Thompson
d0223da2f7 Converted to using the BTB to predict the instruction class. 2021-03-04 09:23:35 -06:00
Ross Thompson
7d6093b302 Hacked the sram memory models to reset their internal registers. This allows the simulation to run but is only temporary.
About 149307ns of simulation run.
2021-02-18 21:32:15 -06:00
Ross Thompson
bbe0db3ebe Integrated the branch predictor into the hardward. Not yet working. 2021-02-17 22:19:17 -06:00
Ross Thompson
ca546beaf8 We now have a solid rough draft of the 2 bit sat counter branch predictor with BTB and RAS.
This is not yet tested but the system verilog does compile.
2021-02-15 14:51:39 -06:00