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4,246 Commits 4 Branches 2 Tags 53 MiB
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234 Commits

Author SHA1 Message Date
Ross Thompson
a79e5e11f6 Merged together the cache speed updates with the cache sram changes. The fstore2 changes still need to be added. 2022-07-18 23:37:18 -05:00
Katherine Parry
cce5fb8dfd moved Ss to execute stage 2022-07-18 20:48:56 +00:00
Katherine Parry
7268b4b334 removed underflow from inexactct calculation 2022-07-18 17:51:18 +00:00
Katherine Parry
5cb9c9f319 merged floating-point radix-2 divider with radix-4 2022-07-15 20:16:59 +00:00
Katherine Parry
2fe8b6e34c fixed error in divsqrt 2022-07-14 18:16:00 +00:00
Katherine Parry
3c1bea1104 removed warnings and took a mux out of the critical path 2022-07-12 18:32:17 -07:00
Katherine Parry
18d7fee541 Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally 2022-07-12 22:37:20 +00:00
Katherine Parry
bea4ec078d variable interations implemented in radix-4 divider 2022-07-11 18:30:21 -07:00
Katherine Parry
97e7e619d9 moved fpu ieu write data mux to lsu 2022-07-08 23:56:57 +00:00
Katherine Parry
75a8cea4e4 srt divider merged into fpu 2022-07-07 16:01:33 -07:00
slmnemo
261248538c sim-buildroot-batch now runs wally-pipelined-batch 
with option buildroot buildroot-no-trace to boot linux from step 0
 2022-07-06 18:06:43 -07:00
David Harris
1bf701d958 Added check to halt testbench on failing to find file 2022-07-05 02:28:59 +00:00
slmnemo
39831e3a40 ./regression-wally -buildroot or ./regression-wally -all now builds Linux from instruction 0 instead of trying to reach instruction 246000000 2022-06-29 13:40:11 -07:00
Katherine Parry
a5fb60eb1a radix-4 early termination working for special cases - not working completely 2022-06-27 20:43:55 +00:00
Katherine Parry
43882d5878 modified result select to account for x/inf 2022-06-24 21:23:15 +00:00
Katherine Parry
b16e55906a div debug - accounted for 1 bit normalization in exponent calculation 2022-06-23 22:59:43 +00:00
Katherine Parry
a5fc6757a1 generate qsel4 in verilog 2022-06-23 21:38:04 +00:00
slmnemo
3a471ac7d6 Added wally32periph to regression 2022-06-23 14:37:18 -07:00
Katherine Parry
1612daa294 Testfloat running division - not passing 2022-06-23 00:07:34 +00:00
slmnemo
09a633d7d1 changed order of makefiles and fixed warnings when running makes 2022-06-21 16:10:18 -07:00
slmnemo
6ba3a7615c added individual makes for arch and wally tests as well as memfiles to Makefile. run using make archtests/wallytests/memfiles 2022-06-21 15:54:24 -07:00
Katherine Parry
03b9878005 removed rv64fp from lint 2022-06-21 15:48:47 -07:00
Daniel Torres
1fab7605f5 fixed issue where the unused spike elf files were being used to find objdump files that didn't exist causing makefile-memfile to fail prematurely 2022-06-21 15:39:04 -07:00
Daniel Torres
475220a5ff arch bug fixes and testbench changes 2022-06-17 15:07:16 -07:00
DTowersM
7c0f4dd954 Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main 2022-06-13 23:34:35 +00:00
Katherine Parry
5f7072bd96 postprocessing unit created and passing all tests 2022-06-13 22:47:51 +00:00
DTowersM
a61d1ab087 simplified coremark 2022-06-10 19:15:17 +00:00
slmnemo
75dffe4dcc Merge branch 'main' into cacheburstmode 2022-06-09 17:51:03 -07:00
David Harris
5612ca7041 qslc_r4a2 generator 2022-06-09 17:26:47 +00:00
slmnemo
a64e65e54c Fixed ifu displaying LSU bus state in wave.do 2022-06-08 15:30:32 -07:00
slmnemo
a5aa75e5de Merge branch 'main' into cacheburstmode 2022-06-08 02:21:33 +00:00
Katherine Parry
eb93bd46d7 fma synth warnings and errors removed 2022-06-06 16:06:04 +00:00
Katherine Parry
b785b6a9bc Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main 2022-06-03 15:34:27 +00:00
Katherine Parry
5ae63f913a fixed compilation errors 2022-06-03 15:34:17 +00:00
slmnemo
0011a1b269 Changed NO_SPOOFING from 0 to 1 in buildroot-no-trace to better facilitate wally booting linux without following QEMU's trace 2022-06-03 04:55:14 -07:00
David Harris
12399ba924 renamed sim-fp to sim-testfloat 2022-06-02 15:05:29 -07:00
Katherine Parry
c5bde75e30 added createallvectors 2022-06-02 21:56:05 +00:00
slmnemo
b35824eadd Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main 2022-06-02 12:54:08 -07:00
Katherine Parry
ccda4c771e fpu paramaterized - except fdivsqrt 2022-06-02 19:50:28 +00:00
slmnemo
568b83a647 Revert "parametrized linux testbench's DEBUG_TRACE and added parameters to relevant calls of the linux testbench in wally-pipelined.do" 
This reverts commit 7d2bfb6db8.
 2022-06-02 12:45:21 -07:00
slmnemo
581c950193 Revert "Added parameter to keep tracking on for buildroot and buildroot-checkpoint in regression.py" 
This reverts commit 05d14bdb3c.
 2022-06-02 12:41:01 -07:00
slmnemo
74319c2af6 Revert "Added parameters for DEBUG_TRACE to buildroot, buildroot-checkpoint, and buildroot-notrace" 
This reverts commit a5490c7096.
 2022-06-02 12:40:46 -07:00
slmnemo
35caa03e46 Updated Linux testbench to use new force/unforce method for Branch predictor init and removed related .txt files 2022-06-02 02:51:51 +00:00
DTowersM
f7491e8445 Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main 2022-05-31 20:13:41 +00:00
DTowersM
abb6ba97cf removed delapidated signals SIE_REGW SIP_REGW TimerIntM SwIntM 2022-05-31 20:10:56 +00:00
Katherine Parry
559c0c278e added unpackinput.sv 2022-05-31 16:18:50 +00:00
slmnemo
3b9ae58f59 Reverted commit 9b55e9da38 2022-05-28 04:00:01 -07:00
slmnemo
2f3689063a Revert Commit 61ebf68939 2022-05-28 03:35:17 -07:00
slmnemo
9b55e9da38 Changed NO_IE_MTIME_CHECKPOINT so it uses the new parameter name 2022-05-28 03:16:55 -07:00
slmnemo
61ebf68939 Deparametrized Linux testbench and removed mentions of parameters in wally-pipelined.do 2022-05-28 03:14:49 -07:00
Katherine Parry
b288f812ab moved lzc to generic and small optimizations on fcvt 2022-05-27 09:04:02 -07:00
slmnemo
ae460eccd4 Added signal to monitor HBURST and comments for each burst in busdp 2022-05-26 13:35:49 -07:00
slmnemo
466fb71add added a todo to riscv-wally so that long buildroot looks for a successful boot rather than a specific instruction 2022-05-25 17:40:57 -07:00
Katherine Parry
c264585fe8 single and double conversions pass all tests 2022-05-25 23:02:02 +00:00
slmnemo
cd9f0cd6bd fixed a comment spelling typo 2022-05-23 19:24:28 -07:00
Katherine Parry
6bc31f2e78 Fixed unpacker bug LT EQ LE pass testfloat 2022-05-20 17:19:50 +00:00
slmnemo
3b4286ec33 fixed lint autofailing due to no log being produced in regression-wally 2022-05-19 18:30:59 -07:00
slmnemo
6c237e43d8 Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main 2022-05-19 17:51:45 -07:00
slmnemo
a5490c7096 Added parameters for DEBUG_TRACE to buildroot, buildroot-checkpoint, and buildroot-notrace 2022-05-19 17:51:26 -07:00
slmnemo
05d14bdb3c Added parameter to keep tracking on for buildroot and buildroot-checkpoint in regression.py 2022-05-19 17:50:48 -07:00
slmnemo
7d2bfb6db8 parametrized linux testbench's DEBUG_TRACE and added parameters to relevant calls of the linux testbench in wally-pipelined.do 2022-05-19 16:21:38 -07:00
Katherine Parry
b0881495a9 Bug fixed in unpacker and sub/add/mul tests pass TestFloat 2022-05-19 20:31:23 +00:00
Katherine Parry
cc0ab94ebc Added fp tests - doesnpass yet 2022-05-19 16:32:30 +00:00
slmnemo
af14c8a064 added instructions to slack notifier 2022-05-18 16:50:31 -07:00
slmnemo
7cd673fa6e simplified make-tests.sh to run the current makefile in regression 2022-05-17 17:29:34 -07:00
slmnemo
1131d41343 added wkdir in regression so regression runs out of box (assuming the old version of arch tests) 2022-05-17 20:32:38 +00:00
Kip Macsai-Goren
25ad39939f put privileged tests back into rv32/64gc 2022-05-04 21:20:25 +00:00
David Harris
9c4de0e9c1 FPU generates illegal instruction if MSTATUS.FS = 00 2022-05-03 11:56:31 +00:00
David Harris
dee32f70bf Switched to behavioral comparator for best PPA 2022-05-03 11:00:39 +00:00
Kip Macsai-Goren
89cce88d33 fixed incorrect configs in regression 2022-04-25 19:28:47 +00:00
Kip Macsai-Goren
0f4ca62157 added working tests to test list, updated regression for new configs 2022-04-25 19:18:15 +00:00
David Harris
03f84bf11c Extended sim time to fully boot Linux. Added comments to hazard unit 2022-04-24 13:51:00 +00:00
Ross Thompson
165a36acac Modified wally-pipelined.do for no trace linux sim. 2022-04-21 09:52:33 -05:00
David Harris
861fbd698b Run 4M instructions in buildroot test to get through kernel & VirtMem startup 2022-04-18 01:29:38 +00:00
David Harris
83d283354c Added comments in fcvt 2022-04-17 16:53:10 +00:00
Ross Thompson
238cc9f9fd Commented output power analysis to speed simulation. 2022-04-16 15:32:59 -05:00
Ross Thompson
f995ec2a54 Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main 2022-04-10 13:41:27 -05:00
Ross Thompson
c3d9eafe60 Modified the linux test bench to take a new parameter which can run simulation from 470M out to login prompt. This shouldn't break the regression test or checkpointing. 2022-04-10 13:27:54 -05:00
bbracker
3b6cb5f0ba small signs of life on new interrupt spoofing 2022-04-08 12:32:30 -07:00
David Harris
c22d6f2848 Added bootmem source ccode 2022-04-05 23:22:53 +00:00
Ross Thompson
d83db2cde5 Fixed the SDC clock divider so it actually can work during reset. This will enable the fpga to operate at a faster clock while the SDC is < 10Mhz. 2022-04-04 09:57:26 -05:00
Ross Thompson
e7abcd862f fpga simulation works again. 2022-04-03 17:31:07 -05:00
Kip Macsai-Goren
cdea062287 added RV64IA config to have a config without compressed instructions 2022-04-02 18:24:08 +00:00
Ross Thompson
987236e463 Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main 2022-04-01 17:18:25 -05:00
Ross Thompson
57eba4355e Updated the fpga test bench. 2022-04-01 17:14:47 -05:00
bbracker
cbff9a7755 expand WALLY-PERIPH test to use SEIP on PLIC context 1 2022-03-31 18:02:06 -07:00
Kip Macsai-Goren
2e68ab7bb4 added test config that doesn't use compressed instructions for privileged tests 2022-03-28 19:12:31 +00:00
Skylar Litz
29d1f64588 add AtemptedInstructionCount signal 2022-03-26 21:28:57 +00:00
Skylar Litz
bb8587e06f update to match new filesystem organization 2022-03-26 21:28:32 +00:00
bbracker
efb5d1dbc0 Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main 2022-03-04 00:06:27 +00:00
bbracker
443dd40ea8 remove imperas32p tests 2022-03-04 00:06:18 +00:00
David Harris
545f569f78 Fixed fma files to stop breaking synthesis. Changed Makefiles to skip Imperas 2022-03-03 15:38:08 +00:00
bbracker
e28ca531e0 fix peripheral test and add it to regression 2022-03-02 23:44:39 +00:00
bbracker
c1290d493f add CSRs to waveview 2022-03-02 18:31:10 +00:00
bbracker
d7b8c9d877 add rv32a tests to regression 2022-03-02 17:54:55 +00:00
bbracker
5f5cc514b8 fix buildroot checkpointing and add it back to regression 2022-03-02 16:00:19 +00:00
bbracker
4f22a55dd4 add LRSC test and add wally64a to regression 2022-03-02 07:09:37 +00:00
bbracker
41b3912abc buildroot graphical sim bugfix 2022-03-01 03:24:23 +00:00
bbracker
04ace8c154 switch linux-testbench infrastructure over to new linux testvectors at /opt/riscv 2022-03-01 03:11:43 +00:00
bbracker
d620fb4442 deprecate imperas64p tests and move them over to the privilege configuration of wally-riscv-arch-test 2022-03-01 00:37:46 +00:00