ShreyaSanghai
|
e33007e30e
|
added localHistoryPredictor
|
2021-04-01 22:22:40 +05:30 |
|
Shreya Sanghai
|
65e9747752
|
fixed bugs in global history to read latest GHRE
|
2021-03-31 21:56:14 -04:00 |
|
Ross Thompson
|
cdb7d15709
|
Fixed bugs with the csr interacting with StallW. StallW is required to pervent updating a csr. Now have a working branch predictor and performance counters to track the number of commited branches and mispredictions.
|
2021-03-24 15:56:55 -05:00 |
|
Ross Thompson
|
a768c0406c
|
Updated the function radix to have a new name FunctionName and it now pervents false transisions from the current function name when the PCD is flushed.
|
2021-03-24 13:03:43 -05:00 |
|
Ross Thompson
|
ace39940b4
|
Fixed RAS errors. Still some room for improvement with the BTB and RAS.
|
2021-03-23 23:00:44 -05:00 |
|
Ross Thompson
|
72d25d4443
|
Fixed a bunch of bugs with the RAS.
|
2021-03-23 21:49:16 -05:00 |
|
Ross Thompson
|
c318606f05
|
Fixed the valid bit issue. Now the branch predictor is actually predicting instructions.
|
2021-03-23 20:20:23 -05:00 |
|
Ross Thompson
|
9d5c351340
|
fixed issue with BTB's valid bit not updating. There is still a problem is valid not ocurring in the correct clock cycle.
|
2021-03-23 20:06:45 -05:00 |
|
Ross Thompson
|
dee5d16850
|
fixed a whole bunch of bugs with the branch predictor. Still an issue with how PCNextF is not updated because the CPU is stalled.
|
2021-03-23 16:53:48 -05:00 |
|
Ross Thompson
|
4836e8fe2c
|
Simulation definitely shows the branch predictor counters and branch predictor don't work. :(
|
2021-03-23 14:04:58 -05:00 |
|
Ross Thompson
|
c7e34bd4a0
|
added a whole bunch of interseting test code for branches which does not work.
|
2021-03-23 13:54:59 -05:00 |
|
Ross Thompson
|
c4f7c65210
|
updated the branch predictor config.
|
2021-03-23 13:54:59 -05:00 |
|
Ross Thompson
|
9909bdd4d5
|
Added first benchmark.
|
2021-03-23 13:54:59 -05:00 |
|
Ross Thompson
|
cebb2bc44d
|
Temporary exe2memfile0.pl script to support starting addresses of 0.
|
2021-03-23 13:54:59 -05:00 |
|
Ross Thompson
|
e6aef66853
|
Broken commit. Trying to get exe2memfile.pl to work correctly with non 0x8000_0000 starting addresses.
|
2021-03-23 13:54:59 -05:00 |
|
Shreya Sanghai
|
09b90557f7
|
PC counts branch instructions
|
2021-03-23 14:25:51 -04:00 |
|
Jarred Allen
|
789c189260
|
Another tweak to regression-wally.py comments
|
2021-03-23 00:18:38 -04:00 |
|
Jarred Allen
|
2c4eda2ba3
|
Slight change to regression-wally.py comments
|
2021-03-23 00:02:40 -04:00 |
|
Noah Boorstin
|
43d23e3d9b
|
busybear: add better warning on illegal instruction
...also it seems that mret is being picked up as an illegal instruction??
|
2021-03-22 18:24:35 -04:00 |
|
Noah Boorstin
|
4160bf50b0
|
busybear: temporarially force rf[5] correct after failure to read CSR
|
2021-03-22 18:12:41 -04:00 |
|
Noah Boorstin
|
4be19421c4
|
busybear: allow overwriting read values
|
2021-03-22 17:28:44 -04:00 |
|
Noah Boorstin
|
b4166e9fd0
|
busybear: finally get the right error
|
2021-03-22 16:52:22 -04:00 |
|
bbracker
|
c3a6d6bf42
|
added delays to uart AHB signals
|
2021-03-22 15:40:29 -04:00 |
|
Noah Boorstin
|
7350b9f18f
|
busybear: comment out some debug printing
|
2021-03-22 14:54:05 -04:00 |
|
Noah Boorstin
|
c4fb51fad1
|
regression: expect 200k instead of 100k busybear instrs
and a minor busybear bugfix
|
2021-03-22 14:47:52 -04:00 |
|
bbracker
|
eea7e2e47e
|
first pass at PLIC interface
|
2021-03-22 10:14:21 -04:00 |
|
Katherine Parry
|
9af0ad815c
|
fixed various bugs in the FMA
|
2021-03-21 22:53:04 +00:00 |
|
Katherine Parry
|
fd381e60d7
|
messy FMA rewrite using section 7.5.4 in The Handbook of Floating-Point Arithmetic
|
2021-03-20 02:05:16 +00:00 |
|
bbracker
|
df51d9908d
|
AHB bugfixes and sim waveview refactoring
|
2021-03-18 18:25:12 -04:00 |
|
Shreya Sanghai
|
804407eab7
|
fixed minor bugs in testbench
|
2021-03-18 17:37:10 -04:00 |
|
Shreya Sanghai
|
dfc86539cc
|
Merge branch 'gshare' into main
Conflicts:
wally-pipelined/regression/wave.do
|
2021-03-18 17:25:48 -04:00 |
|
Ross Thompson
|
9386e6a524
|
Switched to gshare from global history.
Fixed a few minor bugs.
|
2021-03-18 16:05:59 -05:00 |
|
Ross Thompson
|
181a28e875
|
Fixed minor bug with the size of gshare.
|
2021-03-18 16:00:09 -05:00 |
|
Shreya Sanghai
|
f35d3b39c8
|
removed unnecesary PC registers in ifu
|
2021-03-18 16:31:21 -04:00 |
|
Thomas Fleming
|
859d242d81
|
Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main
|
2021-03-18 14:36:42 -04:00 |
|
Thomas Fleming
|
062c4d40da
|
Connect tlb, pagetablewalker, and memory
|
2021-03-18 14:35:46 -04:00 |
|
Thomas Fleming
|
f04e554e35
|
Improve page table creation in python file
|
2021-03-18 14:27:09 -04:00 |
|
Noah Boorstin
|
847bf0b9a6
|
change ifndef to generate/if
|
2021-03-18 12:50:19 -04:00 |
|
Noah Boorstin
|
fa1407f6e3
|
everyone gets a bootram
|
2021-03-18 12:35:37 -04:00 |
|
Noah Boorstin
|
a226e24ed3
|
busybear: update memory map, add GPIO
|
2021-03-18 12:17:35 -04:00 |
|
Teo Ene
|
0ff785549e
|
Switched coremark to RV64IM
|
2021-03-17 22:39:56 -05:00 |
|
Teo Ene
|
db164462ed
|
adapted coremark bare testbench to new dtim RAM HDL
|
2021-03-17 16:59:02 -05:00 |
|
Teo Ene
|
29634f1475
|
Temporarily reverted my last few commits
|
2021-03-17 15:16:01 -05:00 |
|
Teo Ene
|
e6661ea26a
|
fix to last commit
|
2021-03-17 15:07:02 -05:00 |
|
Teo Ene
|
90946d61c5
|
fix to last commit
|
2021-03-17 15:02:15 -05:00 |
|
Teo Ene
|
083a24c06b
|
addition to last commit
|
2021-03-17 14:52:31 -05:00 |
|
Teo Ene
|
ca901513c8
|
Added Ross's addr lab stuff to coremark stuff
|
2021-03-17 14:50:54 -05:00 |
|
Elizabeth Hedenberg
|
bccd37d778
|
fixing coremark branch prediction
|
2021-03-17 15:15:55 -04:00 |
|
Elizabeth Hedenberg
|
74ebe0bef2
|
replicating coremark changes into coremark bare
|
2021-03-17 14:36:34 -04:00 |
|
Elizabeth Hedenberg
|
a3b2ffb2c9
|
Merge branch '3_3_2021' into main
Making sure coremark works with spring break changes
|
2021-03-17 14:11:37 -04:00 |
|