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Author SHA1 Message Date
Kevin Kim
df0d75034b bitmanip decoder spits out regwrite, w64, and aluop signals [NEEDS DEBUG] 2023-02-28 12:09:35 -08:00
Kevin Kim
b61d881c1b added BRegWrite, BW64, BALUOp signals to bctrl and controller 
-TODO: Main decode in bmuctrl must assert these 3 signals
 2023-02-28 11:54:10 -08:00
Kevin Kim
692e406976 changed shifter source select signal name 2023-02-28 11:41:40 -08:00
Kevin Kim
1506d50c63 rename result back to ALUResult in ALU 2023-02-28 07:27:34 -08:00
Ross Thompson
9dd3379744 This icpred and btb changes are causing a performance issue. 2023-02-27 20:00:50 -06:00
Ross Thompson
544abe2819 Modified the BTB to save power by not updating when the prediction is unchanged. 2023-02-27 17:37:29 -06:00
Ross Thompson
bc5aecf948 Merge branch 'main' of https://github.com/openhwgroup/cvw 2023-02-27 09:48:03 -06:00
Ross Thompson
c5d98d5465 Merge pull request #117 from davidharrishmc/dev 
ZMMUL support and MMU cleanup
 2023-02-27 09:46:40 -06:00
David Harris
cf8b5f0783 Added support for ZMMUL 2023-02-27 07:29:53 -08:00
Ross Thompson
318189e5e6 Signal name changes. 2023-02-27 00:39:19 -06:00
David Harris
f40352e82b hptw typo fix 2023-02-26 19:38:34 -08:00
Ross Thompson
c89812b2d4 Branch predictor cleanup. 2023-02-26 21:28:36 -06:00
David Harris
e9ad6ae057 Simplified Access fault logic in HPTW 2023-02-26 18:50:37 -08:00
David Harris
5ae3dd77f9 Merge branch 'main' of https://github.com/openhwgroup/cvw into dev 2023-02-26 18:35:14 -08:00
David Harris
2d7145901b StoreAmo faults are generated instead of load faults on AMO operations 2023-02-26 18:35:10 -08:00
Ross Thompson
e8c5e5b5ff Create module for instruction class prediction and decoding. 2023-02-26 20:20:30 -06:00
Ross Thompson
3964ce3309 Merge branch 'main' of https://github.com/openhwgroup/cvw into main 2023-02-26 19:58:24 -06:00
David Harris
21b28fd1bb Renamed DAPageFault to UpdateDA 2023-02-26 17:51:45 -08:00
David Harris
4274071333 renamed UpperBitsUnequalPageFault to UpperBitsUnequal 2023-02-26 17:32:34 -08:00
David Harris
06bd4783af moved tlb to subdirectory 2023-02-26 17:31:03 -08:00
David Harris
c774b44116 Moved TLB into subdirectory of MMU 2023-02-26 17:28:05 -08:00
Ross Thompson
ad462388cb Merge pull request #116 from davidharrishmc/dev 
Removed unneeded TLBFlush from TLBMiss logic
 2023-02-26 12:07:41 -06:00
Ross Thompson
72be4318b8 Merge branch 'main' of https://github.com/openhwgroup/cvw into main 2023-02-26 12:06:06 -06:00
David Harris
0b3d47b2d5 Merge branch 'main' of https://github.com/openhwgroup/cvw into dev 2023-02-26 10:04:47 -08:00
David Harris
dc447ed5ed Removed unneeded TLBFlush from TLBMiss 2023-02-26 10:04:16 -08:00
Ross Thompson
849cbcbf20 Merge pull request #115 from davidharrishmc/dev 
Fixed SSTC being unusable in M-MODE without Status.TM.  Disable STIME…
 2023-02-26 12:02:54 -06:00
David Harris
54b8e7c629 Access faults are geted by ~TLBMiss rather than ~(Translate & ~TLBHit) 2023-02-26 09:58:34 -08:00
David Harris
35653a18b7 Renamed HPTW_WRITES_SUPPORTED to SVADU_SUPPORTED 2023-02-26 09:38:32 -08:00
David Harris
f31764c3e1 Renamed DAPageFault to HPTWDAPageFault in hptw to avoid name conflict with DAPageFault from tlbcontrol 2023-02-26 07:12:43 -08:00
David Harris
fe161f6bde Fixed missing assign when SSTC is not supported 2023-02-26 07:12:13 -08:00
David Harris
8895114152 Fixed SSTC being unusable in M-MODE without Status.TM. Disable STIMECMP registers when SSTC_SUPPORTED = 0 2023-02-26 06:30:43 -08:00
Ross Thompson
7f8034013d PHT was enabled using the wrong ~flush and ~stall. 2023-02-24 22:57:32 -06:00
Ross Thompson
eb9dc7e67d gshare cleanup. 2023-02-24 22:55:51 -06:00
Ross Thompson
56a70d12bb Merge branch 'main' of https://github.com/openhwgroup/cvw 2023-02-24 19:57:18 -06:00
Ross Thompson
9df05f0b3d More signal renames. 2023-02-24 19:56:55 -06:00
Ross Thompson
8bd4a4c35b Renamed signals to match new figures. 2023-02-24 19:51:47 -06:00
Kevin Kim
f5d3e0e8a0 removed old shifter 2023-02-24 17:33:47 -08:00
Kevin Kim
0f5871d4dc Merge pull request #1 from kipmacsaigoren/kkim_alu_new 
removed sign-extension muxes in shifter
 2023-02-24 17:31:36 -08:00
Ross Thompson
f95f326b3d Renamed signals to match figure 10.18. 2023-02-24 19:22:14 -06:00
Kevin Kim
601c6fcdc4 removed now-redundant zero-extend mux in alu 2023-02-24 17:14:12 -08:00
Kevin Kim
1d4200e3a3 took sign extension out of shifter 2023-02-24 17:09:56 -08:00
David Harris
be5bf22469 Merge pull request #114 from ross144/main 
Fix the branch predictor's gshare and btb critical path issue
 2023-02-24 16:55:34 -08:00
Ross Thompson
40a164a8da Merge branch 'main' of https://github.com/openhwgroup/cvw 2023-02-24 18:50:35 -06:00
Ross Thompson
4031b89f18 Possible fix to btb performance issue. 2023-02-24 18:36:41 -06:00
Ross Thompson
ea8cb7dd78 Cleanup. 2023-02-24 18:20:42 -06:00
Ross Thompson
a14dcaa241 Completed critical path gshare fix. 2023-02-24 18:02:00 -06:00
Ross Thompson
31d6531af2 Prep to fix gshare critical path. 2023-02-24 17:54:48 -06:00
Ross Thompson
5db56460b9 Modified btb forwarding logic to reduce critical path. 2023-02-24 17:47:43 -06:00
Kevin Kim
00a0170b30 optimized mux to shifter, passes rv32/64i 2023-02-24 12:09:34 -08:00
Kip Macsai-Goren
f77d8206ec Merge remote-tracking branch 'upstream/main' into bit-manip 2023-02-24 09:28:24 -08:00