Kunlin Han
a55bb01d1d
Update README and put logs in the right places.
2024-04-11 20:16:55 -07:00
Kunlin Han
e25177cf4c
Add verilator support for wsim.
2024-04-11 20:02:20 -07:00
Rose Thompson
a31ede3c02
Merge pull request #725 from jordancarlin/main
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Add build files from examples directory to gitignore
2024-04-11 16:41:23 -05:00
Rose Thompson
ab74de45ed
Added fortran compiler to buildroot for spec benchmarks.
2024-04-11 13:58:13 -05:00
Rose Thompson
cf27ef1729
Updated .gitignore for branch prediction results.
2024-04-11 10:31:27 -05:00
Rose Thompson
6097444b5a
Added missing file for compiling the fpga zero stage bootloader.
2024-04-11 10:30:56 -05:00
slmnemo
90040a6a21
Added extra path to run-imperas-linux.sh to match new questa directory with .do files
2024-04-09 16:13:31 -07:00
James E. Stine
fd4ce8eca7
Remove path for old GCC tools as it causes some issues. Experimentation by removing caused no problems as just use bin is needed
2024-04-09 10:37:32 -05:00
James E. Stine
760291d6cc
On some Ubuntu boxes, the path for Wally interferes with other tools. Prepending Wally path to make sure there are no conflicts.
2024-04-09 09:00:45 -05:00
Jordan Carlin
1e3b602cc6
Add files built from examples to gitignore
2024-04-08 12:14:32 -07:00
Rose Thompson
e53e12ad5c
Merge pull request #719 from Shreesh-Kulkarni/patch-4
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Modified coremark_sweep.py to tabulate both 32 and 64-bit configurations.
2024-04-08 13:59:31 -05:00
Shreesh Kulkarni
18b367e0b0
updated date of file modification
2024-04-08 22:58:32 +05:30
Shreesh Kulkarni
dd3d36d1a7
Modified coremark_sweep.py to tabulate both 32 and 64-bit configurations.
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Modified the script to tabulate 64-bit RISC-V configurations as well.
2024-04-08 22:56:32 +05:30
Kunlin Han
6234db81a0
regression-wally is now in PATH
2024-04-08 09:58:20 -07:00
David Harris
3e9ef8bd92
Merge pull request #717 from jordancarlin/main
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Update tool-chain-install to only build Sail c emulator
2024-04-08 08:18:25 -07:00
Jordan Carlin
e0312bd3af
Update tool-chain-install to only build Sail c emulator
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Wally only uses the c emulator, so there is no reason to have it build the other models (like ocaml).
When only the c emulator is used it is also able to only build the differences since the last build.
2024-04-08 08:13:07 -07:00
Rose Thompson
b4b0cb81b9
Merge pull request #716 from davidharrishmc/dev
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Fixed coremark to use wsim, more testfloat regression tests
2024-04-08 09:10:25 -05:00
David Harris
f5602d8b55
Ignore coremark_results
2024-04-08 05:57:50 -07:00
David Harris
60e70c1986
Fixed testbench-fp replication length for regression-wally --testfloat. Changed regression-wally to expect -- in named arguments.
2024-04-08 05:57:18 -07:00
Kunlin Han
ffe554a927
Add extra prompt.
2024-04-07 10:41:40 -07:00
David Harris
d182a2925e
Fixed bug in testbench_fp for XLEN > FLEN
2024-04-07 05:40:18 -07:00
David Harris
0b3bb72280
Added missing fdh_ieee_rv64gc derived config
2024-04-06 21:48:06 -07:00
David Harris
fec160d6f9
Updated coremark to use wsim
2024-04-06 21:38:44 -07:00
David Harris
76570ed2c2
Merge branch 'main' of https://github.com/openhwgroup/cvw into dev
2024-04-06 20:51:46 -07:00
David Harris
dc6dc93b22
Merge pull request #712 from ross144/main
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Fixed the buildroot vs +acc flag issue
2024-04-06 20:08:25 -07:00
David Harris
5092743365
Merge pull request #714 from jordancarlin/main
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Update RISCOF ISA config MISA values to be consistent
2024-04-06 20:07:39 -07:00
Rose Thompson
7ec6c7ee51
Merge pull request #713 from Karl-Han/site_setup_fallback
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Add fallback on site-setup.sh if no RISCV/site-setup.sh exists.
2024-04-06 20:24:39 -05:00
Jordan Carlin
6ef6bc042d
Update RISCOF ISA config MISA values to be consistent
2024-04-06 18:18:50 -07:00
Kunlin Han
fd2f88ef33
Add fallback on site-setup.sh if no RISCV/site-setup.sh exists.
2024-04-06 17:06:06 -07:00
Kunlin Han
e36c170204
Improve buildroot and linux vector.
2024-04-06 16:47:32 -07:00
Rose Thompson
bb072fba84
Fixed the buildroot issue.
2024-04-06 18:25:53 -05:00
David Harris
fb130edbf1
Merge branch 'main' of https://github.com/openhwgroup/cvw into dev
2024-04-06 16:17:47 -07:00
David Harris
fe9b6129b8
Starting to add more testfloat
2024-04-06 16:17:42 -07:00
David Harris
b7b835f4eb
Merge pull request #711 from ross144/main
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Got questa running with the wavefiles with unified do for testbench and testbench-fp
2024-04-06 16:16:29 -07:00
Rose Thompson
d0d1166e3f
Got the separation of the -G and +variable arguments in the questa do file.
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regression still runs.
2024-04-06 18:04:48 -05:00
Rose Thompson
cdcff9d368
Updated sim-wally to work with new run scripts.
2024-04-06 16:32:07 -05:00
Rose Thompson
41845ec17e
Fixed issues around missing directories.
2024-04-06 16:29:58 -05:00
Rose Thompson
46fdfde7ec
Removed unnecessary display from testbench.
2024-04-06 16:10:18 -05:00
Rose Thompson
8885c32f7c
Merge branch 'main' of https://github.com/openhwgroup/cvw
2024-04-06 15:55:00 -05:00
Rose Thompson
0a13cdf1d1
Merge pull request #710 from davidharrishmc/dev
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Reorganized regression to support multiple simulations
2024-04-06 15:54:12 -05:00
David Harris
c73a48cf22
Removed unused wave-dos
2024-04-06 13:52:13 -07:00
David Harris
e8111da88a
Removed unused old regression-wally
2024-04-06 13:47:44 -07:00
David Harris
6b844a2e6e
Added GUI support and removed unused wave files
2024-04-06 13:43:06 -07:00
David Harris
d3d39d39d0
Buildroot regression passing
2024-04-06 11:50:25 -07:00
David Harris
3c855e3e90
Passing arguments to buildroot, not yet checking result correctly
2024-04-06 11:42:41 -07:00
David Harris
b3f007ec7f
Working on buildroot in regression
2024-04-06 11:11:22 -07:00
David Harris
ac9a21873d
Pass TEST to testbench with +TEST=<name> rather than -G TEST=<name> so that we don't have to recompile for every new test
2024-04-06 10:34:21 -07:00
David Harris
347df26713
Fixed regression running; buildroot pending
2024-04-06 09:46:56 -07:00
David Harris
9ee7544d3c
TestFloat running; normal testbench broken
2024-04-06 09:28:07 -07:00
David Harris
4b19f6d542
testfloat running through wsim; moved lint, regression, wsim to bin directory so we don't need ./
2024-04-06 08:22:39 -07:00
