Add verilator support for wsim.

.gitignore

@@ -1,5 +1,7 @@
 **/work*
 **/wally_*.log
+/**/obj_dir*
+/**/gmon*
 
 .nfs*
 

bin/wsim

@@ -65,6 +65,8 @@ if (args.sim == "questa"):
     print("Running Questa with command: " + cmd)
     os.system(cmd)
 elif (args.sim == "verilator"):
-    print("Running Verilator on %s %s", args.config, args.testsuite)
+    # PWD=${WALLY}/sim CONFIG=rv64gc TESTSUITE=arch64i
+    print(f"Running Verilator on {args.config} {args.testsuite}")
+    os.system(f"/usr/bin/make -C {regressionDir}/verilator WALLYCONF={args.config} TEST={args.testsuite}")
 elif (args.sim == "vcs"):
     print("Running VCS on %s %s", args.config, args.testsuite)

sim/verilator/Makefile

@@ -0,0 +1,45 @@
+.PHONY: profile run questa clean
+
+OPT=
+PARAMS?=-DVERILATOR=1 --no-trace-top
+NONPROF?=--stats
+WORKING_DIR=${WALLY}/sim/verilator
+TARGET=$(WORKING_DIR)/target
+SOURCE=${WALLY}/config/shared/*.vh ${WALLY}/config/${WALLYCONF} ${WALLY}/src/cvw.sv ${WALLY}/testbench/testbench.sv ${WALLY}/testbench/common/*.sv ${WALLY}/src/*/*.sv ${WALLY}/src/*/*/*.sv
+
+WALLYCONF?=rv64gc
+TEST?=arch64i
+
+default: run
+
+profile: obj_dir_profiling/Vtestbench_$(WALLYCONF)
+	$(WORKING_DIR)/obj_dir_profiling/Vtestbench_$(WALLYCONF) +TEST=$(TEST) 
+	mv gmon.out gmon_$(WALLYCONF).out
+	gprof $(WORKING_DIR)/obj_dir_profiling/Vtestbench_$(WALLYCONF) gmon_$(WALLYCONF).out > gmon_$(WALLYCONF).log
+	verilator_profcfunc gmon_$(WALLYCONF).log > gmon_$(WALLYCONF).log2
+
+run: obj_dir_non_profiling/Vtestbench_$(WALLYCONF)
+	time $(WORKING_DIR)/obj_dir_non_profiling/Vtestbench_$(WALLYCONF) +TEST=$(TEST) 
+	
+obj_dir_non_profiling/Vtestbench_$(WALLYCONF): $(SOURCE)
+	mkdir -p obj_dir_non_profiling
+	time verilator \
+	--Mdir obj_dir_non_profiling -o Vtestbench_$(WALLYCONF) \
+	$(OPT) $(PARAMS) $(NONPROF) \
+	--timescale "1ns/1ns" --timing --binary --top-module testbench  --relative-includes \
+	"-I${WALLY}/config/shared" "-I${WALLY}/config/$(WALLYCONF)" \
+	${WALLY}/src/cvw.sv ${WALLY}/testbench/testbench.sv ${WALLY}/testbench/common/*.sv ${WALLY}/src/*/*.sv ${WALLY}/src/*/*/*.sv
+	
+obj_dir_profiling/Vtestbench_$(WALLYCONF): $(SOURCE)
+	mkdir -p obj_dir_profiling
+	time verilator \
+	--Mdir obj_dir_profiling -o Vtestbench_$(WALLYCONF) \
+	--prof-cfuncs $(OPT) $(PARAMS) \
+	--timescale "1ns/1ns" --timing --binary --top-module testbench  --relative-includes \
+	"-I${WALLY}/config/shared" "-I${WALLY}/config/$(WALLYCONF)" ${WALLY}/src/cvw.sv ${WALLY}/testbench/testbench.sv ${WALLY}/testbench/common/*.sv ${WALLY}/src/*/*.sv ${WALLY}/src/*/*/*.sv
+
+questa:
+	time vsim -c -do "do ${WALLY}/sim/wally-batch.do $(WALLYCONF) $(TEST)"
+
+clean:
+	rm -rf $(WORKING_DIR)/obj_dir_non_profiling $(WORKING_DIR)/obj_dir_profiling

sim/verilator/README.md

@@ -0,0 +1,19 @@
+# Simulation with Verilator
+
+Different executables will be built for different architecture configurations, e.g., rv64gc, rv32i. A executable can run all the test suites that it can run with `+TEST=<testsuite>`.
+
+This folder contains the following files that help the simulation of Wally with Verilator:
+
+- executables
+    - `obj_dir_non_profiling`: non-profiling executables for different configurations
+    - `obj_dir_profiling`: profiling executables for different configurations
+- [NOT WORKING] `logs`: contains all the logs
+
+## Examples
+
+```shell
+# non-profiling mode
+make WALLYCONF=rv64gc TEST=arch64i run
+# profiling mode
+make WALLYCONF=rv64gc TEST=arch64i profile
+```

sim/verilator/verilate

@@ -1,42 +0,0 @@
-#!/bin/bash
-# simulate with Verilator
-
-export PATH=$PATH:/usr/local/bin/
-verilator=`which verilator`
-
-basepath=$(dirname $0)/..
-#for config in rv32e rv64gc rv32gc rv32imc rv32i rv64i rv64fpquad; do
-
-# define associateive array of tests to run
-declare -A suites
-rv64gccases=("arch64zba" "arch64zbb" "arch64zbc" "arch64zbs" "arch64i" "arch64m" "arch64a" "arch64f" "arch64d" "arch64c" "arch64f_fma" "arch64d_fma" "wally64priv")
-suites["rv64gc"]=${rv64gccases[@]}
-rv64icases=("arch64i")
-suites["rv64i"]=${rv32icases[@]}
-rv32gccases=("arch32zba" "arch32zbb" "arch32zbc" "arch32zbs" "arch32i" "arch32m" "arch32a" "arch32f" "arch32d" "arch32c" "arch64f_fma" "arch64d_fma" "wally32priv")
-suites["rv32gc"]=${rv32gccases[@]}
-rv32imccases=("arch32i" "arch32m" "arch32c")
-suites["rv32imc"]=${rv32imccases[@]}
-rv32icases=("arch32i")
-suites["rv32i"]=${rv32icases[@]}
-rv32ecases=("arch32e")
-suites["rv32e"]=${rv32ecases[@]}
-
-for config in ${!suites[@]}; do
-    for suite in ${suites[${config}]}; do
-        echo "Verilating ${config} ${suite}"
-        if !($verilator --timescale "1ns/1ns" --timing --binary "$@" -GTEST="\"${suite}\"" --top-module testbench "-I$basepath/config/shared" "-I$basepath/config/$config" $basepath/src/cvw.sv $basepath/testbench/testbench.sv $basepath/testbench/common/*.sv   $basepath/src/*/*.sv $basepath/src/*/*/*.sv --relative-includes ); then
-            echo "Exiting after ${config} ${suite} verilation due to errors or warnings"
-            exit 1
-        fi
-        ./obj_dir/Vtestbench 
-    done
-done
-echo "Verilation complete"
-
-# command line to invoke Verilator on rv64gc arch64i
-# verilator -GTEST="\"arch64i\"" --timescale "1ns/1ns" --timing --binary --top-module testbench "-I../config/shared" "-I../config/rv64gc" ../src/cvw.sv ../testbench/testbench.sv ../testbench/common/*.sv ../src/*/*.sv ../src/*/*/*.sv --relative-includes
-
-# command line with debugging to address core dumps
-# verilator -CFLAGS -DVL_DEBUG -CFLAGS -D_GLIBCXX_DEBUG -CFLAGS -ggdb -LDFLAGS -ggdb -CFLAGS -fsanitize=address,undefined -LDFLAGS -fsanitize=address,undefined --timescale "1ns/1ns" --timing --binary --top-module testbench "-I../config/shared" "-I../config/rv64gc" ../src/cvw.sv ../testbench/testbench.sv ../testbench/common/*.sv ../src/*/*.sv ../src/*/*/*.sv --relative-includes
-