4383 Commits

This Branch

This Branch

All Branches

Author	SHA1	Message	Date
David Harris	e39694694c	Restored ahbtranstype	2022-08-25 18:22:26 -07:00
David Harris	83d3782f2c	Removed ahbtranstype	2022-08-25 18:21:45 -07:00
David Harris	543fbd1fa9	Removed WordCountFlag	2022-08-25 18:21:18 -07:00
David Harris	d118fcbde8	Removed UncachedAccess	2022-08-25 18:20:52 -07:00
David Harris	bac95823b6	Removed UncachedRW	2022-08-25 18:19:41 -07:00
David Harris	cfcde754c3	Removed CacheBusAck	2022-08-25 18:17:34 -07:00
David Harris	9bc62ce124	Removed SelUncachedAdr	2022-08-25 18:15:59 -07:00
David Harris	f39e62eeea	Removed Cache_Enabled	2022-08-25 18:13:34 -07:00
David Harris	5bfaf31df0	Removed STATE_BUS_FETCH and STATE_BUS_WRITE	2022-08-25 18:12:09 -07:00
David Harris	85e93e2bb7	Removed CacheFetchLine and CacheWriteLine	2022-08-25 18:10:15 -07:00
David Harris	23a102b1b9	Removed CountEn	2022-08-25 18:05:44 -07:00
David Harris	e485e986a5	Removed wordcount	2022-08-25 18:04:49 -07:00
David Harris	69dff87feb	Added buscachefsm for system with bus and cache	2022-08-25 18:01:01 -07:00
David Harris	5340c45dfc	Separated busdp for cache from simpler logic for no cache	2022-08-25 17:54:04 -07:00
David Harris	9a92bfe095	Simplified swbytemask	2022-08-25 17:32:16 -07:00
David Harris	eb753b3b3f	FIxed wallypipelinedsoc merge conflict	2022-08-25 15:36:47 -07:00
David Harris	902d2067ba	Removed delayed AHB signals from top level	2022-08-25 15:34:14 -07:00
Ross Thompson	db635e3ad2	Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main	2022-08-25 16:01:02 -05:00
Ross Thompson	8c8b95ecf5	Finally resolved the issues with the rv32ic and rv64ic configurations.	2022-08-25 16:00:55 -05:00
Ross Thompson	5c2bc20dbd	Almost fixed issues with irom and dtim address selection.	2022-08-25 15:52:25 -05:00
David Harris	302a7fa294	Extended HADDR to PA_BITS	2022-08-25 13:11:36 -07:00
Ross Thompson	179aec3616	Still not working with rv32ic.	2022-08-25 15:03:54 -05:00
David Harris	07225cabb7	Fixed brom name	2022-08-25 12:48:00 -07:00
Ross Thompson	d23888407b	Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main	2022-08-25 14:45:02 -05:00
David Harris	1226b2889e	ahblite cleanup	2022-08-25 12:44:25 -07:00
Ross Thompson	3b612d6201	Possible fixes for earily messup of rv32ic and rv64ic configs.	2022-08-25 14:42:08 -05:00
Ross Thompson	f67010c688	Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main	2022-08-25 14:40:52 -05:00
David Harris	bc0c7d0cd8	Cleaned up SelBusWord	2022-08-25 11:18:13 -07:00
David Harris	c442dea173	Removed M sufix from busdp signals	2022-08-25 11:13:01 -07:00
David Harris	48f346baf8	Renamed LSUFunct3M to Funct3 in busdp	2022-08-25 11:08:12 -07:00
David Harris	9bada9c14a	Renaming LSU signals from busdp	2022-08-25 11:05:10 -07:00
David Harris	3ba961d1a8	renamed BusBuffer to FetchBuffer	2022-08-25 10:44:39 -07:00
David Harris	dda3b441d7	Continued busdp/ebu simplification	2022-08-25 10:20:02 -07:00
David Harris	19fe6d106c	Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main	2022-08-25 09:52:49 -07:00
David Harris	aba914ea5e	Renamed AHB signals coming out of LSU to LSH_<AHBNAME>	2022-08-25 09:52:08 -07:00
Ross Thompson	e605ef57dc	BROKEN. Don't use this commit. ... Issue running cacheless with bus.	2022-08-25 11:02:46 -05:00
Ross Thompson	b0aea77b20	Added generate around uncore.	2022-08-25 10:35:24 -05:00
Ross Thompson	01a7718471	Added generate around ebu.	2022-08-25 09:24:13 -05:00
Ross Thompson	ad485fe591	Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main	2022-08-25 09:03:34 -05:00
Ross Thompson	701324eeb8	Updated ila signals. ... Improve fpga wave config. added back in the fpga preload.	2022-08-25 09:03:29 -05:00
David Harris	ae0702d129	Renamed DCache to Cache in busdp/busfsm signal interface	2022-08-25 06:21:22 -07:00
David Harris	3500286803	Cleanup typos	2022-08-25 04:32:19 -07:00
David Harris	db5c941d6f	Minor name cleanups	2022-08-25 04:28:25 -07:00
David Harris	1206b388c7	Replaced dtim with rom-based IROM in IFU. Moved cache control signals out of DTIM and IROM	2022-08-25 04:06:27 -07:00
David Harris	f7209627c2	removed simpleram and modified dtim to use bram1p1rw	2022-08-25 03:39:57 -07:00
David Harris	562be633ab	Stripped write capaibilty out of rom_ahb	2022-08-24 17:23:08 -07:00
David Harris	a131e1f17a	Added ROM module and moved memories into generic/mem	2022-08-24 17:03:22 -07:00
David Harris	6785644fb8	Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main	2022-08-24 16:30:28 -07:00
David Harris	b21b91234b	Ram cleanup	2022-08-24 16:30:25 -07:00
Ross Thompson	d10edfa5e0	No longer need wally-pipelined-fpga.do.	2022-08-24 18:10:45 -05:00