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76 Commits

Author SHA1 Message Date
sarah-harris
75038c279d Minor fixes in datapath.sv and ieu.sv (comments, putting signals in correct grouping) 2023-01-18 07:26:08 -08:00
David Harris
4a01ebd4d9 IEU comment cleanup 2023-01-17 10:51:44 -08:00
David Harris
e0dbbb60c9 Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main 2023-01-17 06:47:06 -08:00
David Harris
cd281996a0 IEU signal comment cleanup 2023-01-17 06:47:02 -08:00
sarah-harris
9fb7c8132a Changing signal name to ImmExtD/E to match figures 
Changing signal name:
ExtImmD/E -> ImmExtD/E

to match figures.
 2023-01-17 06:33:58 -08:00
David Harris
2c00ac5254 pipelined/src/ieu/ieu.sv 2023-01-17 06:08:26 -08:00
sarah-harris
3124ebc3e1 IEU cleanup 
IEU cleanup
 2023-01-17 06:02:26 -08:00
David Harris
e67f125201 Header comments 2023-01-12 04:35:44 -08:00
Ross Thompson
2f3bf9eaf5 Improved LSU formating. 2023-01-11 18:52:46 -06:00
sarah-harris
829ab2c9aa Added Sarah.Harris@unlv.edu to alu.sv 
Added Sarah.Harris@unlv.edu to alu.sv
 2023-01-11 15:20:41 -08:00
David Harris
7d93659f6b changed name to CORE-V-WALLY 2023-01-11 15:15:08 -08:00
David Harris
b911056e66 Changed Wally to CORE-V Wally 2023-01-11 14:03:44 -08:00
David Harris
19f0eb2aa1 Rename FP and FPU to F in signal names 2023-01-11 11:46:36 -08:00
David Harris
e6f110b953 Replaced MDUE with IntDivE in FDIVSQRT 2023-01-11 11:06:37 -08:00
David Harris
e92cffbb5e Changed MIT license to Solderpad License 2023-01-10 11:35:20 -08:00
David Harris
0a011f4548 Remove unused signals 2023-01-07 05:46:22 -08:00
David Harris
6d22c73676 Branch logic simplification and remove unused signals 2023-01-07 05:42:34 -08:00
David Harris
499b52a7f0 Handle special case Int Div/Rem of |A| < |B| in a single cycle 2023-01-01 13:54:01 -08:00
David Harris
921b5582da ALU cleanup 2022-12-24 07:18:35 -08:00
Ross Thompson
c8a0e7685a DON'T USE. First commit in attempt to move fpustall detection into the decode stage. 2022-12-23 12:47:18 -06:00
Ross Thompson
30dd86d146 Removed unnecessary stall when MatchDE was driven 1 by RdE == 0. 2022-12-23 11:45:42 -06:00
David Harris
07dc11a508 IFU mux for CSRWriteFenceM conditional on ZICSR/ZIFENCEI 2022-12-20 15:38:30 -08:00
Ross Thompson
b4bdf446cc Implement FENCE.I as NOP when ZIFENCEI is not supported. 2022-12-20 17:34:11 -06:00
Ross Thompson
c253b882be Reworked the hazards to eliminate StallFCause. Flush and CSRWrites now flush F,D,E stages and set the correct PCNextF in the M stage. 2022-12-15 09:53:35 -06:00
David Harris
e80e84aace Added IDIV_ON_FPU flag to control whether integer division uses FPU 2022-12-15 06:37:55 -08:00
David Harris
643a2e7cf9 Use FPU divider for integer division when F is supported 2022-12-14 17:03:13 -08:00
David Harris
3a07d56d33 Renamed FPUStallD to FCvtIntStallD 2022-12-02 11:55:23 -08:00
David Harris
46680b80a7 Eliminated store after store stall when no cache; simplified divshiftcalc logic. 2022-09-21 13:02:34 -07:00
Ross Thompson
51adf6cba9 Modified the lsu/ifu memory configurations. 2022-08-24 12:35:15 -05:00
David Harris
d72068d582 Only stall FPU to IEU on convert instructions with dependencies 2022-08-23 12:57:18 -07:00
David Harris
05aa18fe14 Cleaned up fcvt selection control to IEU and FPUIllegalInst signals 2022-08-23 12:17:19 -07:00
David Harris
d19fc99bf0 Simplify IEU-FP datapath 2022-08-23 11:16:36 -07:00
David Harris
0e489443f2 Finished FPU-LSU interface cleanup 2022-08-22 13:43:04 -07:00
David Harris
d556adde16 Simplified FPU-LSU interface to skip IEU 2022-08-22 13:28:51 -07:00
David Harris
2e20b3ed72 Removed 2-cycle FPU-IEU latency stall 2022-08-22 16:14:15 +00:00
David Harris
f6f09db4fb Commented out unused comparators 2022-08-22 08:28:28 +00:00
Katherine Parry
8f98f3bfab added rv32 double precision stores - untested 2022-06-28 21:33:31 +00:00
Madeleine Masser-Frye
6229779b97 Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally 2022-06-21 20:31:06 +00:00
Madeleine Masser-Frye
3c08861479 switched comparator to dc flip version 2022-06-21 20:30:33 +00:00
Katherine Parry
03d823f5d7 added fld in rv32 - needs testing 2022-06-20 22:53:13 +00:00
Katherine Parry
5f7072bd96 postprocessing unit created and passing all tests 2022-06-13 22:47:51 +00:00
David Harris
9065b684f8 Added stalls for pending SFENCE.VMA and FENCE.I in hazard unit 2022-06-02 09:37:59 -07:00
David Harris
7cf5d481c0 Cleaned up comments in controller 2022-06-02 15:48:33 +00:00
David Harris
4335895b21 Added comments to some files, added a+b = 0 detector to comparator.sv 2022-05-28 09:41:48 +00:00
David Harris
61199ccd13 More signal cleanup 2022-05-12 15:39:44 +00:00
David Harris
7e764fbda1 More unused signal cleanup 2022-05-12 15:15:30 +00:00
David Harris
e37d262e4c PPA script progress 2022-05-11 18:11:51 +00:00
David Harris
554c2b3550 Illegal instruction fault when running FPU instruction with STATUS_FS = 0 2022-05-03 18:32:01 +00:00
David Harris
9c4de0e9c1 FPU generates illegal instruction if MSTATUS.FS = 00 2022-05-03 11:56:31 +00:00
David Harris
dee32f70bf Switched to behavioral comparator for best PPA 2022-05-03 11:00:39 +00:00