Ross Thompson
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cc8826a15a
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Merge branch 'main' of github.com:ross144/cvw
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2023-07-17 16:01:05 -05:00 |
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Ross Thompson
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a5f75d568b
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Added artya7 device tree.
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2023-07-17 16:01:02 -05:00 |
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Ross Thompson
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5ce4ac963f
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Updated arty a7 fpga top.
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2023-07-17 15:55:57 -05:00 |
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Ross Thompson
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c7283f8c83
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Merge branch 'main' of github.com:ross144/cvw
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2023-07-17 15:52:27 -05:00 |
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Ross Thompson
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80093a0eb1
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Updated the FPGA zero stage bootloader.
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2023-07-17 15:52:13 -05:00 |
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Ross Thompson
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20751790f6
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Fixed bug with performance counters not tracking the correct number of requested icache and dcache memory operations.
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2023-07-14 16:31:44 -05:00 |
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Ross Thompson
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6ddd8d4e2b
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Fixed the icache and dcache overlogging issue.
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2023-07-14 15:47:05 -05:00 |
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Ross Thompson
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b4d9d2370c
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Somehow the Arty A7 device tree was missing.
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2023-07-13 14:10:45 -05:00 |
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Ross Thompson
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de5cab2bc6
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Merge branch 'main' of https://github.com/openhwgroup/cvw
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2023-07-13 11:26:49 -05:00 |
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Ross Thompson
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cebcf1995c
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Merge pull request #361 from davidharrishmc/dev
Clean up privilege rs1 decoding and implement svinval as sfence.vma
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2023-07-13 12:26:30 -04:00 |
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David Harris
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45667c9f4d
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Clean up privilege rs1 decoding and implement svinval as sfence.vma
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2023-07-13 02:41:17 -07:00 |
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David Harris
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40ac1f7872
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Merge pull request #360 from ross144/main
Fixed the privilege decoder bug which prevented the fpga linux boot.
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2023-07-13 01:40:28 -07:00 |
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Ross Thompson
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96b8f34d1a
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Got xcelium running wally, but it fails to actually preload the memories.
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2023-07-12 13:56:57 -05:00 |
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Ross Thompson
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add1a6996e
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Merge branch 'main' of github.com:ross144/cvw
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2023-07-11 15:09:07 -05:00 |
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Ross Thompson
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f30c92e82a
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Added wfi and interrupt to tracer.
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2023-07-11 15:09:04 -05:00 |
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Ross Thompson
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58dfc15844
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Merge branch 'main' of github.com:ross144/cvw into main
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2023-07-11 15:08:26 -05:00 |
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Ross Thompson
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c12bc4f435
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Created separate temporary testbench for xcelium.
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2023-07-11 15:07:33 -05:00 |
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Ross Thompson
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b26dc6db7f
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Simplificaiton of function tracker.
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2023-07-11 10:51:17 -05:00 |
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Ross Thompson
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05b1cce2d1
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RTL changes for Xcelium.
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2023-07-11 10:51:02 -05:00 |
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Ross Thompson
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e647937b27
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Fixed the privilege decoder bug which prevented the fpga linux boot.
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2023-07-10 17:00:06 -05:00 |
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Ross Thompson
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47ee92d6e5
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Merge pull request #359 from davidharrishmc/dev
CSR updates
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2023-07-10 13:16:57 -04:00 |
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David Harris
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c91bbc3ca8
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MENVCFG only exists if U_SUPPORTED
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2023-07-09 18:25:07 -07:00 |
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David Harris
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77e0bdba50
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Merge pull request #358 from ross144/main
Fixes the FPGA linux boot after parameterization. Note commit 4d1ddd0c breaks the FPGA again
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2023-07-07 17:09:57 -07:00 |
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Ross Thompson
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4e54e5169b
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Changes for xcelium.
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2023-07-07 18:22:28 -05:00 |
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Ross Thompson
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74834bde2c
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Removed duplicate signal name from testbench.
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2023-07-07 16:34:08 -05:00 |
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Ross Thompson
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850d8c2b24
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Fixed slight bug in config from parameterization.
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2023-07-07 16:33:34 -05:00 |
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Ross Thompson
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da499aafc0
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Merge branch 'main' of github.com:ross144/cvw
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2023-07-07 13:25:00 -05:00 |
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Ross Thompson
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40b2f7ff9c
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Updated comments.
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2023-07-06 15:24:26 -05:00 |
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Ross Thompson
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dc50ddd75e
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Removed unused parameter.
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2023-07-06 14:57:07 -05:00 |
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Ross Thompson
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0394f3232f
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Merge branch 'main' of https://github.com/openhwgroup/cvw
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2023-07-06 14:55:43 -05:00 |
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David Harris
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74a573cedd
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Removed outdated commment about endianness
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2023-07-06 12:41:46 -07:00 |
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David Harris
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29e62f05a4
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Removed MTINST, which is not used in a system without a hypervisor
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2023-07-06 12:40:53 -07:00 |
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Ross Thompson
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18278b7f4d
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It's a bit hacky, but the plic now passes the regression test and should be compatible with the fpga.
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2023-07-06 14:07:37 -05:00 |
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Ross Thompson
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ba9d5287d9
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This is at least functionally correct, but has verilator lint issues.
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2023-07-06 11:53:34 -05:00 |
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Ross Thompson
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930aed0898
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closer, but the wally32/64priv tests are failing.
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2023-07-05 17:47:38 -05:00 |
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Ross Thompson
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c0fdd3fbca
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Partially solved fpga boot.
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2023-07-05 17:30:55 -05:00 |
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Ross Thompson
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60cc5c97f4
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Merge pull request #355 from davidharrishmc/dev
Decoder improvements
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2023-07-05 00:08:49 -04:00 |
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David Harris
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19efc4eda8
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Fixed comment typo
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2023-07-04 11:34:58 -07:00 |
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David Harris
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34ce25ca81
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Commented SVADU requirements for wally32priv mmu tests
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2023-07-04 11:34:07 -07:00 |
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David Harris
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4f07d89d74
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fixed spacing in fdivsqrt
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2023-07-04 11:27:36 -07:00 |
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David Harris
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4c921fc797
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Added logic to warn about x in memory reads. Added cbo instruction names to testbench decoder
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2023-07-02 13:29:27 -07:00 |
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David Harris
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e6ba362794
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Added prefetch instructions; sent cbo instructions to LSU
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2023-07-02 10:55:35 -07:00 |
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David Harris
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cc87317189
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Added prefetch signals
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2023-07-02 10:06:58 -07:00 |
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David Harris
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a5c6ae1f78
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Enhanced decoder to produce individual CMOpE output for the 4 CMO instructions
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2023-07-02 09:35:05 -07:00 |
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David Harris
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6a88ac28e4
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Fixed csr typos
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2023-07-02 02:01:40 -07:00 |
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David Harris
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96477a4879
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Fixed ENVCFG to reply on both MENVCFG and SENVCFG when in user mode
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2023-07-02 02:00:27 -07:00 |
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David Harris
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e2708534cd
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Added environment configuration control (menvcfg/senvcfg) of cbo instructions
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2023-07-02 01:52:25 -07:00 |
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David Harris
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4d1ddd0c91
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Gated floating-point load/stores with STATUS_FS and added initial decoding for Cache Management Operations
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2023-07-02 00:34:30 -07:00 |
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David Harris
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110dd42cfb
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improved decoder checking atomic and RW and MW and privileged instructions
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2023-07-02 00:02:03 -07:00 |
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David Harris
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07cf1dd9da
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improved decoder checking atomic instructions
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2023-07-01 23:10:57 -07:00 |
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