Commit Graph

6842 Commits

Author SHA1 Message Date
Ross Thompson
cc8826a15a Merge branch 'main' of github.com:ross144/cvw 2023-07-17 16:01:05 -05:00
Ross Thompson
a5f75d568b Added artya7 device tree. 2023-07-17 16:01:02 -05:00
Ross Thompson
5ce4ac963f Updated arty a7 fpga top. 2023-07-17 15:55:57 -05:00
Ross Thompson
c7283f8c83 Merge branch 'main' of github.com:ross144/cvw 2023-07-17 15:52:27 -05:00
Ross Thompson
80093a0eb1 Updated the FPGA zero stage bootloader. 2023-07-17 15:52:13 -05:00
Ross Thompson
20751790f6 Fixed bug with performance counters not tracking the correct number of requested icache and dcache memory operations. 2023-07-14 16:31:44 -05:00
Ross Thompson
6ddd8d4e2b Fixed the icache and dcache overlogging issue. 2023-07-14 15:47:05 -05:00
Ross Thompson
b4d9d2370c Somehow the Arty A7 device tree was missing. 2023-07-13 14:10:45 -05:00
Ross Thompson
de5cab2bc6 Merge branch 'main' of https://github.com/openhwgroup/cvw 2023-07-13 11:26:49 -05:00
Ross Thompson
cebcf1995c
Merge pull request #361 from davidharrishmc/dev
Clean up privilege rs1 decoding and implement svinval as sfence.vma
2023-07-13 12:26:30 -04:00
David Harris
45667c9f4d Clean up privilege rs1 decoding and implement svinval as sfence.vma 2023-07-13 02:41:17 -07:00
David Harris
40ac1f7872
Merge pull request #360 from ross144/main
Fixed the privilege decoder bug which prevented the fpga linux boot.
2023-07-13 01:40:28 -07:00
Ross Thompson
96b8f34d1a Got xcelium running wally, but it fails to actually preload the memories. 2023-07-12 13:56:57 -05:00
Ross Thompson
add1a6996e Merge branch 'main' of github.com:ross144/cvw 2023-07-11 15:09:07 -05:00
Ross Thompson
f30c92e82a Added wfi and interrupt to tracer. 2023-07-11 15:09:04 -05:00
Ross Thompson
58dfc15844 Merge branch 'main' of github.com:ross144/cvw into main 2023-07-11 15:08:26 -05:00
Ross Thompson
c12bc4f435 Created separate temporary testbench for xcelium. 2023-07-11 15:07:33 -05:00
Ross Thompson
b26dc6db7f Simplificaiton of function tracker. 2023-07-11 10:51:17 -05:00
Ross Thompson
05b1cce2d1 RTL changes for Xcelium. 2023-07-11 10:51:02 -05:00
Ross Thompson
e647937b27 Fixed the privilege decoder bug which prevented the fpga linux boot. 2023-07-10 17:00:06 -05:00
Ross Thompson
47ee92d6e5
Merge pull request #359 from davidharrishmc/dev
CSR updates
2023-07-10 13:16:57 -04:00
David Harris
c91bbc3ca8 MENVCFG only exists if U_SUPPORTED 2023-07-09 18:25:07 -07:00
David Harris
77e0bdba50
Merge pull request #358 from ross144/main
Fixes the FPGA linux boot after parameterization.  Note commit 4d1ddd0c breaks the FPGA again
2023-07-07 17:09:57 -07:00
Ross Thompson
4e54e5169b Changes for xcelium. 2023-07-07 18:22:28 -05:00
Ross Thompson
74834bde2c Removed duplicate signal name from testbench. 2023-07-07 16:34:08 -05:00
Ross Thompson
850d8c2b24 Fixed slight bug in config from parameterization. 2023-07-07 16:33:34 -05:00
Ross Thompson
da499aafc0 Merge branch 'main' of github.com:ross144/cvw 2023-07-07 13:25:00 -05:00
Ross Thompson
40b2f7ff9c Updated comments. 2023-07-06 15:24:26 -05:00
Ross Thompson
dc50ddd75e Removed unused parameter. 2023-07-06 14:57:07 -05:00
Ross Thompson
0394f3232f Merge branch 'main' of https://github.com/openhwgroup/cvw 2023-07-06 14:55:43 -05:00
David Harris
74a573cedd Removed outdated commment about endianness 2023-07-06 12:41:46 -07:00
David Harris
29e62f05a4 Removed MTINST, which is not used in a system without a hypervisor 2023-07-06 12:40:53 -07:00
Ross Thompson
18278b7f4d It's a bit hacky, but the plic now passes the regression test and should be compatible with the fpga. 2023-07-06 14:07:37 -05:00
Ross Thompson
ba9d5287d9 This is at least functionally correct, but has verilator lint issues. 2023-07-06 11:53:34 -05:00
Ross Thompson
930aed0898 closer, but the wally32/64priv tests are failing. 2023-07-05 17:47:38 -05:00
Ross Thompson
c0fdd3fbca Partially solved fpga boot. 2023-07-05 17:30:55 -05:00
Ross Thompson
60cc5c97f4
Merge pull request #355 from davidharrishmc/dev
Decoder improvements
2023-07-05 00:08:49 -04:00
David Harris
19efc4eda8 Fixed comment typo 2023-07-04 11:34:58 -07:00
David Harris
34ce25ca81 Commented SVADU requirements for wally32priv mmu tests 2023-07-04 11:34:07 -07:00
David Harris
4f07d89d74 fixed spacing in fdivsqrt 2023-07-04 11:27:36 -07:00
David Harris
4c921fc797 Added logic to warn about x in memory reads. Added cbo instruction names to testbench decoder 2023-07-02 13:29:27 -07:00
David Harris
e6ba362794 Added prefetch instructions; sent cbo instructions to LSU 2023-07-02 10:55:35 -07:00
David Harris
cc87317189 Added prefetch signals 2023-07-02 10:06:58 -07:00
David Harris
a5c6ae1f78 Enhanced decoder to produce individual CMOpE output for the 4 CMO instructions 2023-07-02 09:35:05 -07:00
David Harris
6a88ac28e4 Fixed csr typos 2023-07-02 02:01:40 -07:00
David Harris
96477a4879 Fixed ENVCFG to reply on both MENVCFG and SENVCFG when in user mode 2023-07-02 02:00:27 -07:00
David Harris
e2708534cd Added environment configuration control (menvcfg/senvcfg) of cbo instructions 2023-07-02 01:52:25 -07:00
David Harris
4d1ddd0c91 Gated floating-point load/stores with STATUS_FS and added initial decoding for Cache Management Operations 2023-07-02 00:34:30 -07:00
David Harris
110dd42cfb improved decoder checking atomic and RW and MW and privileged instructions 2023-07-02 00:02:03 -07:00
David Harris
07cf1dd9da improved decoder checking atomic instructions 2023-07-01 23:10:57 -07:00