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Author SHA1 Message Date
David Harris
bdf1a8ba73 changed DMEM and IMEM configurations to support BUS/TIM/CACHE 2022-02-03 00:41:09 +00:00
David Harris
172a02551b Removed Busybear and Buildroot Configuration 2022-02-02 20:32:22 +00:00
David Harris
c12407ba6a Removed Busybear dependencies 2022-02-02 20:28:21 +00:00
Ross Thompson
f3c2e426b1 Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main 2022-02-02 11:41:54 -06:00
Ross Thompson
2f7cf2bc7f Fixed testbench so coremark stops. 2022-02-02 11:37:48 -06:00
David Harris
761dae72fe Config file & wally-riscv-arch-test cleanup 2022-02-02 16:35:52 +00:00
Ross Thompson
1a907ef4d1 Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main 2022-02-02 10:16:02 -06:00
Ross Thompson
88a408b3e6 Added helpful signals to wavefile. 
Makefile for tests now creates the function address to name mapping files.
The function name and test name are included in the wave file.
 2022-02-02 10:15:54 -06:00
Ross Thompson
ae36931bb2 Added correct stop condition for coremark. 2022-02-02 09:53:51 -06:00
David Harris
ee315bd62b examples cleanup 2022-02-02 12:57:13 +00:00
Ross Thompson
2d8b0aa650 Modified makefiles to generate function address to name mappings for modelsim. 2022-02-01 18:25:03 -06:00
Ross Thompson
058b368a22 Improved function_radix to not printout warnings when no valid function is found. 2022-02-01 18:03:09 -06:00
Ross Thompson
138b17a399 Setup the main regression test to be able to handle coremark. 2022-02-01 17:00:11 -06:00
Ross Thompson
910d16b642 More cleanup of IFU. 2022-02-01 14:32:27 -06:00
Ross Thompson
554df2377e Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main 2022-02-01 10:50:24 -06:00
David Harris
baa8c793da Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main 2022-01-31 22:58:37 +00:00
David Harris
069f270d1a Removed soc_flow 2022-01-31 22:58:33 +00:00
Ross Thompson
1d29a70677 Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main 2022-01-31 16:32:24 -06:00
Ross Thompson
dce9ee12b4 IFU and LSU now share the same busdp module. 2022-01-31 16:25:41 -06:00
Ross Thompson
a04aa283cb partial ifu cleanup. 2022-01-31 16:08:53 -06:00
Kip Macsai-Goren
97f5878ec4 Renamed test library 2022-01-31 20:11:21 +00:00
Kip Macsai-Goren
4d8ca0d031 updated minfo test to account for no mconfigptr 2022-01-31 20:11:21 +00:00
Kip Macsai-Goren
63f4baf357 fixed CSR read-only test to have correct output 2022-01-31 20:11:21 +00:00
Ross Thompson
b05abc1795 cleanup. 2022-01-31 13:29:04 -06:00
Ross Thompson
c1311ca56a Fixed modelsim warning with linux simulation. 2022-01-31 12:57:02 -06:00
Ross Thompson
d2ab17e1af Repaired linux-wave.do 2022-01-31 12:54:18 -06:00
Ross Thompson
3475e142a5 Repaired wavefile and fixed modelsim warning. 2022-01-31 12:34:17 -06:00
Ross Thompson
1476a79ea2 Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main 2022-01-31 12:17:37 -06:00
Ross Thompson
fa8914a830 Cleanup busdp. 2022-01-31 12:17:07 -06:00
Ross Thompson
7c3d6bbdb4 Moved lsu virtual memory logic into separate module. 2022-01-31 11:56:03 -06:00
Ross Thompson
e35a8299ec Encapsulated dtim. 2022-01-31 11:23:55 -06:00
Ross Thompson
dbe40856a2 Removed unused signals in the LSU. 2022-01-31 10:35:35 -06:00
Ross Thompson
bfbc31d184 Moved atomic logic to own module. 2022-01-31 10:28:12 -06:00
Ross Thompson
ef770fd183 Encapsulated the bus data path into a separate module. 2022-01-31 10:15:48 -06:00
Kip Macsai-Goren
1077cf08b0 added machine info test that uses new test library 2022-01-31 05:54:43 +00:00
Kip Macsai-Goren
5386f1b4fa tentatively remade test lib to use macros for more flexibility 2022-01-31 05:54:43 +00:00
Kip Macsai-Goren
01d6c3a4b9 converted library to header file for RISCV test compliance 2022-01-31 05:54:43 +00:00
Kip Macsai-Goren
e3ea593ed8 updated tests to use test title instead of number encoding 2022-01-31 05:54:42 +00:00
James Stine
3f5f5e48fa Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main 2022-01-30 21:03:24 -06:00
James Stine
6c9b4f648c Change DC script to not do a full synthesis but partial synthesis until I configure to be more optimized 2022-01-30 21:02:41 -06:00
David Harris
2d112698b7 Replaced || and && with | and & 2022-01-31 01:07:35 +00:00
David Harris
c367d19fc6 Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main 2022-01-31 00:59:49 +00:00
David Harris
ea85e185f1 gitmodules 2022-01-31 00:59:44 +00:00
James Stine
8db15aee31 Add synthesis using DC shell back into repository 2022-01-30 17:35:15 -06:00
James Stine
1080281cb2 Add synthesis using DC shell back into repository 2022-01-30 17:34:56 -06:00
Ross Thompson
d52c5b0393 LSU and IFU cleanup. 2022-01-28 15:26:06 -06:00
Ross Thompson
de0bef4f5b Updated wave.do to match the ifu/lsu changes. 2022-01-28 14:37:15 -06:00
Ross Thompson
147d71fd46 Clean up of mmu instances in IFU and LSU. 2022-01-28 14:02:05 -06:00
Ross Thompson
4a8d0cb981 Moved spills to own module. 2022-01-28 13:40:35 -06:00
Ross Thompson
7fedc6b878 Cleaned up the InstrMisalignedFault. 2022-01-28 13:19:24 -06:00