slmnemo
|
ba572b46f4
|
Updated testbench to initialize using force and releases storing zero in all memory locations in branch predictor. Fixed arch64i bug related to failing bge due to an incorrect signature.
|
2022-05-17 01:04:13 +00:00 |
|
slmnemo
|
ede0a3237d
|
quit
|
2022-05-17 01:03:09 +00:00 |
|
David Harris
|
730bcac6ba
|
Partitioned privileged pipeline registers into module
|
2022-05-12 20:45:45 +00:00 |
|
David Harris
|
de5b61291f
|
Experiments with prefix comparator; minor fixes in WFI and testbench warnings
|
2022-04-17 21:43:12 +00:00 |
|
Ross Thompson
|
1993069986
|
Converted over to the blockram/sram memories. Now I just need to cleanup. But before the cleanup I wan to make sure the FPGA synthesizes with these changes and actually keeps the preload.
|
2022-03-30 11:04:15 -05:00 |
|
Ross Thompson
|
fc2b4453ec
|
rv32gc and rv64gc now use the updated ram3.sv (will rename to ram.sv) which uses a vivado block ram compatible memory. Still need to update simpleram.sv to use this block ram compatible memory.
|
2022-03-29 23:48:19 -05:00 |
|
Ross Thompson
|
de2672231d
|
Partial fix to allow byte write enables with fpga and still get a preload to work.
|
2022-03-29 19:12:29 -05:00 |
|
Ross Thompson
|
d68446cf92
|
Added new asserts to testbench.
|
2022-03-11 15:41:53 -06:00 |
|
bbracker
|
443dd40ea8
|
remove imperas32p tests
|
2022-03-04 00:06:18 +00:00 |
|
bbracker
|
d7b8c9d877
|
add rv32a tests to regression
|
2022-03-02 17:54:55 +00:00 |
|
bbracker
|
4f22a55dd4
|
add LRSC test and add wally64a to regression
|
2022-03-02 07:09:37 +00:00 |
|
bbracker
|
d620fb4442
|
deprecate imperas64p tests and move them over to the privilege configuration of wally-riscv-arch-test
|
2022-03-01 00:37:46 +00:00 |
|
bbracker
|
6caa97bb26
|
change UART PLIC IRQ mapping from 4 to 10 to match virt model; move WALLY-PERIPH tests to wally arch tests
|
2022-02-22 03:46:08 +00:00 |
|
David Harris
|
e5097e67d4
|
Fixed TIM tests; rv32e test still failing
|
2022-02-08 15:24:37 +00:00 |
|
David Harris
|
e9a519a228
|
Patching up testbench; fixed false passing, but rv32ic and rv32e tests now fail
|
2022-02-08 12:40:02 +00:00 |
|
David Harris
|
096242a6d8
|
Merged TIM and regular testbenches. RV32e now working and back in regression.
|
2022-02-08 12:18:13 +00:00 |
|
David Harris
|
23868a33bc
|
Temporarily changed rv32e config to use TIM, but it still fails. Added rv32e tests.
|
2022-02-05 04:16:18 +00:00 |
|
David Harris
|
16b5fee795
|
RV32e tests
|
2022-02-04 14:30:36 +00:00 |
|
David Harris
|
e92461159d
|
cache cleanup
|
2022-02-03 15:36:11 +00:00 |
|
David Harris
|
9e0055cbb9
|
More config file cleanup; 32ic tests broken
|
2022-02-03 01:08:34 +00:00 |
|
David Harris
|
bdf1a8ba73
|
changed DMEM and IMEM configurations to support BUS/TIM/CACHE
|
2022-02-03 00:41:09 +00:00 |
|
Ross Thompson
|
2f7cf2bc7f
|
Fixed testbench so coremark stops.
|
2022-02-02 11:37:48 -06:00 |
|
Ross Thompson
|
ae36931bb2
|
Added correct stop condition for coremark.
|
2022-02-02 09:53:51 -06:00 |
|
Ross Thompson
|
138b17a399
|
Setup the main regression test to be able to handle coremark.
|
2022-02-01 17:00:11 -06:00 |
|
David Harris
|
62e5c7fd13
|
Comments in LSU code about restructuring
|
2022-01-27 15:53:59 +00:00 |
|
David Harris
|
ca1f7ce5d3
|
Renamed wallypipelinedhart to wallypipelinedcore
|
2022-01-20 16:02:08 +00:00 |
|
David Harris
|
5842d780a7
|
Defined rv32e and rv32emc configs
|
2022-01-17 14:01:01 +00:00 |
|
David Harris
|
f7f3882cb8
|
Moved Dcache into bus block
|
2022-01-15 00:39:07 +00:00 |
|
David Harris
|
37bf5347cf
|
LSU cleanup
|
2022-01-14 23:55:27 +00:00 |
|
Ross Thompson
|
9f7e3f147b
|
Partial local dtim in lsu configuration.
|
2022-01-13 17:50:31 -06:00 |
|
David Harris
|
453a794f86
|
Testbench directory cleanup
|
2022-01-07 17:02:16 +00:00 |
|
David Harris
|
3d2671a8b0
|
Reformatted MIT license to 95 characters
|
2022-01-07 12:58:40 +00:00 |
|
David Harris
|
d17a305538
|
Finished removing generate statements
|
2022-01-05 16:41:17 +00:00 |
|
Ross Thompson
|
888a60d8d6
|
Switched block for line in caches.
|
2022-01-04 22:08:18 -06:00 |
|
David Harris
|
9ddc6db0a6
|
Removed imperas mmu tests; using wallypriv instead
|
2022-01-04 23:14:53 +00:00 |
|
David Harris
|
115287adc8
|
Renamed wally-pipelined to pipelined
|
2022-01-04 19:47:41 +00:00 |
|