Commit Graph

29 Commits

Author SHA1 Message Date
David Harris
41c7d5c510 uncore cleanup 2023-01-14 06:15:35 -08:00
David Harris
7d93659f6b changed name to CORE-V-WALLY 2023-01-11 15:15:08 -08:00
David Harris
b911056e66 Changed Wally to CORE-V Wally 2023-01-11 14:03:44 -08:00
David Harris
e92cffbb5e Changed MIT license to Solderpad License 2023-01-10 11:35:20 -08:00
Ross Thompson
403434580d Fixed the uart transmit fifo overrun bug. 2022-10-26 14:48:09 -05:00
Ross Thompson
9ba487c323 Setup to run with both the vcu108 and vcu118 boards. Set the parameters in the Makefile. 2022-10-24 15:38:39 -05:00
Ross Thompson
7244ca1e7b Bit width error. 2022-10-24 13:48:47 -05:00
Jacob Pease
b1170ec7a2 Extended rxfifotimeout count to actually be 4 characters long. 2022-10-20 17:35:49 -05:00
Ross Thompson
92accfb1a6 Updated uart settings and fpga wave config. 2022-10-18 15:05:33 -05:00
Jacob Pease
1e7bbe1a87 Fixed rxfifotimeout restarting for every new character, even when already high. 2022-09-19 18:00:30 -05:00
David Harris
93d7d7179e Added parity and stop bit tests to UART 2022-07-28 04:35:51 +00:00
slmnemo
ca4511b6dc Fixed UART FIFO bugs and added FIFO tests 2022-07-22 17:13:19 -07:00
David Harris
d22587090b Reset MSR on read 2022-07-22 04:29:27 +00:00
slmnemo
3d2c6683d8 Fixed UART bug related to parity and MSR/LSR 2022-07-21 20:35:46 -07:00
David Harris
76302a8599 PLIC and UART passing tests on APB 2022-07-06 13:26:14 +00:00
Ross Thompson
848abf29b5 Fixed receive fifo ITNR bug. 2022-05-22 10:55:28 -05:00
Ross Thompson
1318f702cf Added more debug signals to uart. 2022-05-21 19:47:40 -05:00
David Harris
5c607f2b6b Simplified profile for UART boot; added warnings on UART Rx errors 2022-04-21 04:54:45 +00:00
Ross Thompson
c16dec88de Increased uart baud rate to 230400.
Added uart signals to debugger.
2022-04-17 15:23:39 -05:00
Ross Thompson
7d0462dc59 UART and clock speed changes to support 30Mhz. 2022-04-12 17:56:36 -05:00
Ross Thompson
7abde2b566 Increazed fpga clock speed to 35Mhz.
linux boot is much faster.
2022-04-05 15:09:49 -05:00
Ross Thompson
f58a1eff9e Fixed linting issues. 2022-04-01 15:20:45 -05:00
bbracker
e60139d3ee fix lingering overrun error bug 2022-03-31 17:54:32 -07:00
bbracker
b8fd06576c fix lint bugs in PLIC and UART 2022-02-22 05:04:18 +00:00
bbracker
e7934c585a change RX side of UART to aslo be LSB-first 2022-02-22 03:34:08 +00:00
David Harris
15fb7fee60 Cleaned up synthesis warnings 2022-02-11 01:15:16 +00:00
David Harris
3d2671a8b0 Reformatted MIT license to 95 characters 2022-01-07 12:58:40 +00:00
David Harris
d17a305538 Finished removing generate statements 2022-01-05 16:41:17 +00:00
David Harris
115287adc8 Renamed wally-pipelined to pipelined 2022-01-04 19:47:41 +00:00